* Posts by endricschubert

1 publicly visible post • joined 5 Mar 2021

Xilinx pops a 16-core 64-bit Arm system-on-chip from NXP into its latest FPGA-based 100Gbps smart NIC

endricschubert

In SmartNICs it is all about architecture

This is a fascinating approach not only for freeing up CPU cores in servers but more importantly in getting the overall system latency down. As the industry has been replacing HDDs with SDDs, the IO bottleneck has shifted (again back) to networking. However, having a SmartNICs per se is not fully addressing those network bottleneck issues as the overall system architecture of a SmartNIC in a server makes a major difference. A hybrid approach of offloading onto dedicated TCP cores (implemented in FPGA or ASIC), then local network protocol processing on the SmartNIC (Solarflare Onload), then TCP Bypasses such as DPDK seems to be the most efficient and most flexible approach. My 2 cents, Endric