Strip off the decoder...
Not especially likely, as that would expose micro-architectural details that you probably want to be able to vary from model to model, such as number and structure of pipelines and size of re-order/re-name buffers.
Has been done before though, twice: Transmeta did essentially exactly that, replacing the x86 decode logic with a software dynamic compilation system that targeted an in-order VLIW processor to do the work. Nvidia's "Denver" cores and follow-up (as seen in the Nexus-9 tablet and several of the car-AI modules) do a very similar thing but for an Arm source-instruction-set.
Both work nicely on loopy, numerical code, but quite poorly on large, non-loopy code like user interfaces, database engines and operating systems.
Interestingly, Dave Ditzel was involved in both of those designs, and is now founder of Esperanto, a RISC-V company.