Posts by ChrisPVille

US Air Force inks deal with Raytheon on Windows 10 (and other) support for ARSE

Next

Some poor soul is going to get Special High Intensity Training for this. They might as well charge it through the ARSE contract while they're at it.

Canonical adds ZFS on root as experimental install option in Ubuntu

I smell profit

This is oracle we're talking about. They're probably just waiting for widespread adoption before suing everyone running Linux for having their dubiously licensed kit. I'm sure they will be merciful and allow their victims to buy Oracle Linux licenses as a remedy (one per installed kernel, just to be safe).

Updated version of their logo ->

RIP Hyper-Threading? ChromeOS axes key Intel CPU feature over data-leak flaws – Microsoft, Apple suggest snub

Re: Does it have to be completely disabled?

I was wondering about that too. Given that threads already have access to all the data in a process, restricting SMT to threads with the same process ID presumably wouldn't allow any new channels for information leakage.

I don't know exactly how Intel's hyperthreads are managed, but I assume the thread selection is handled by the OS like in other CPUs. While that would be a big performance penalty for virtualized workloads and things like web browsers, it probably would be a cheap/free mitigation for compute intensive single process workloads like rendering, simulation, etc.

We might once again live in a world where people stop bolting on multi-process to their programs when multi-thread would do.

I'll, er, get the tab? It's Internet Edgeplorer as browser pulls up chair to the Chromium table

We've Seen this Before

"rather than a simple copy and paste, the objects are linked back to their sources..."

This sounds vaguely reminiscent of OLE and all its promises of multimedia documents. I guess everything old is new again, except now with 70% more web browser.

Data-spewing Spectre chip flaws can't be killed by software alone, Google boffins conclude

Re: "but the basic problem is that chip designers traded security for speed. "

I don't think Spectre is really the fault of the MMU. It's more that the caches are leaking program state via the side-effects of speculated instructions and other processes can infer that state with careful timing analysis.

The article hints at the hardware solution to this problem, which could be something like tagging cache entries with a process ID to ensure they won't be accessible from another process. It might also be possible to hold pending cache entries from speculated loads separate and not commit them until the instruction graduates. Either way, it's not a simple software fix. The processors in question all violate their own programmer's model, that is speculation will have no visible side-effects.

You're right that Spectre does look a lot like the timing and information leak attacks used against embedded devices, and while Spectre targets most speculating CPUs, I hope people who use caches in general are now carefully considering what could go wrong from a security perspective.

Why does that website take forever to load? Clues: Three syllables, starts with a J, rhymes with crock of sh...

Re: On the cusp...

We're already there. A lot of websites are following in Google's footsteps with their one-page all javascript runs-in-the-browser nonsense. Other than purely cosmetic features and some specialty stuff like WebRTC, javascript and other browser delivered executable code has done nothing except introduce a lot of security vulnerabilities.

I wonder how much electricity has been wasted worldwide over the last decade because of browser scripts. I bet it's at least in the terajoule range.

How's this for sci-fi: Orbiting probes face fiery death dive from planet's radiation belts. And that planet is Earth

At orbital altitudes, generally it's atomic oxygen that poses a big corrosion threat. Everything from plastics to ceramics to metals all suffer from impact erosion and chemical corrosion along their leading edges.

Because of the Space Shuttle and the LDEF (which got stuck in orbit for over 5 years), it's a reasonably well studied subject. NASA has an accessible paper with pretty pictures here: https://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/20040191331.pdf

Core blimey... When is an AMD CPU core not a CPU core? It's now up to a jury of 12 to decide

Superscalar is not multicore

I think the sharing of FPU resources is completely irrelevant. As everyone has noted, FPUs are sometimes shared among heterogeneous multicore CPU designs (or omitted entirely).

The bigger problem is the shared instruction fetch and decode. What AMD has here is much much closer to a conventional superscalar CPU, with independent execution resources able to run through a single instruction stream out-of-order, than the usual definition of multi-core.

Calling the single superscalar module two cores is definitely misleading, at least from a CPU design perspective. By AMD's logic, many Intel, IBM, ancient MIPS, etc. chips would all have inflated core counts.

Free for every Reg reader – and everyone else, too: Arm Cortex-M CPUs for Xilinx FPGAs

Re: risc-v fears?

Not only that, but it's a way for ARM to poke Intel/Altera in the eye.