* Posts by WorBlux

9 publicly visible posts • joined 4 Dec 2015

IBM takes Power10 processors down to 7nm with Samsung, due to ship by end of 2021


Re: Not so subtle

100% of the design and firmware is available to partners. It's additionally OpenPower's goal to release all firmware sources and let you build it yourself .

'Unfixable' boot ROM security flaw in millions of Intel chips could spell 'utter chaos' for DRM, file encryption, etc


Thunderbolt does, but that's not even the big implication of this. If the SKS is compromised, and attacker could put any arbitrary image on the SPI flash chip. Not a big deal for some of us, for others it's a disaster in the making.


Re: Honest question...

From what I can tell, there is more than one DMA controller, and it's potentially the one of the PCH (chipset) that is leaking. However the request is going though the main IOMMU, which is brought online in a security disabled state.

'Prodigy' chip moonshot gets hand from Arm CPU guru Prof Steve Furber


Now quite like the mill.

Yes this is radically different from the mill, and is somewhat reflective of the old multi-flow processors in some ways and close to xeon phi in others.

Best I can tell, it the compiler is scheduling out of order (loads before branches) and expcilitly marking results with branch/poisen flags so they can be revoked on mispredict. Rename is largely unneeded as the compiler is aware of the speculation and can color registers with it in mind, as are retire stations and re-order buffers for similar reasons

Bundles are variable length but contain instructions that can issue together (like the mill and in this respect but bundles have specific alignment requirements more strick than the mill. ) Another similarity to the mill may be the vector mask registers, which if used correctly may help to vector-ize more code than cpu's with/out. However it still looks like mill is a lot wider, and presents better opportunity software pipe-lining.

I also suspect they have some sort of hyper-block thing going on that lets you dispatch to a different part of the code (that you presumably have data for already) on cache miss + stall. This is a hard to do on the compiler, but should scientific code should play pretty well with it. ( a sort of micro-threading)

Further things to note - DDR5 and pci-e 5. which on thier own should be power and performance uplifts.

Data from below the L2 crosses a mesh to get to the core, which is a known low-power config option. There's only one big and expensive data line around the whole processor group.

Additionally the main ALU's are massively wide and support vector and matrix ops that fill the whole width, which is a wind on code that can actually use it.

Intel ME controller chip has secret kill switch


Re: I guess I know what architectures to avoid...

The only open ARM platforms are fairly low-features, and lack proper a proper MMU that can enforce memory protections. (Anything with access to the DMA function, can access the entire memory space)

Russian spies used Kaspersky AV to hack NSA staffer, swipe exploit code – new claim


Re: US intelligence source make stuff up ..

"In other words, we're just making this shit up. Lets just call it what it is, certain US commercial interests want to deny market share to Kaspersky under the pretext of national security." Even if it did happen, all it means is that NSA subcontractors are terrible at opsec and should be prohibited.

The contract put top secret exploits on his personal computer --- WTF? Additionally Kepersky is not approved for use on top-secret systems. If true this subcontractor is going to be fired and maybe go to jail for mishandling classified material.

Learn you Func Prog on five minute quick!


Re: Recursion

"Stobb forgot to discuss one important dogma of Functional Programming: No loops, ever."

Not really, this is generally just a byproduct of maintaining pure functions. Often the compiler will optimize recursion into a GOTO, other times it builds a stack of function calls. , A while loop checks the state of some memory location, does some stuff updating at least one memory location and jumps into a goto. Using recursion or higher-order functions is a way to prove you aren't relying on state mutation, and thus certain types of reasoning about the code are guaranteed to be correct in a way you couldn't guarantee if there was a while loop capable on manipulating internal state.

Eight budget-friendly 1TB SSD data packers for real people


Re: Ever had an SSD fail?

>>It hardly comes across your mind that maybe the SSD thing is *principally* wrong for the position.

I've been running a 90 GB OCZ Agility 2 for about 4 years now as my main OS drive on my main computer. That was the smallest drive on a "notoriously" unreliable budget line. If has almost 17,000 hours on it. 2,480 power cycles, (55 unexpected). It has 4288 GB of writes, meaning about 47 write cycles and no retired blocks. I fully expect the drive to outlast my computer.

Or course I'm running Linux and went through a lot of trouble to put the least where and tear on the drive. 1. File-system on drive without partitions to aligned with write blocks, ext4 stripped to align with erase blocks. 2. TRIM 3. Swap partition on a conventional HDD.. 4. /run as a tmpfs

There are similar precautions you can take with windows, but sometimes it feels futile as more often than not you feel like you are fighting the old M$, rather than actually being able to make the OS behave like you know it should.

Microsoft encrypts explanation of borked Windows 10 encryption


Re: RIBsiq

'BTW: how does one turn on the equivalent functionality (FDE using HW encryption on SED) on Linux, please?"

msed by r0m30