From what I've read the first Dubhe based chip should be announced sometime in Q2 as the Fang Jinghong 8100 SoC (JH8100), probably 6 core (but might be 8) so at least four Tianshu large cores (normal frequency 2 GHz) and at least two Tianshu small cores (normal frequency 1.5 GHz); RV64GCBNVH; 12-stage pipeline design and can realise superscalar and deep out-of-order execution; hardware H.264 / H.265 / VP9 / AV1 codec decoding; estimated SPECint2006 9.0 / GHz, Dhrystone 6.6 DMIPS / MHz, CoreMark7.6 / MHz; support for 4K 60fps displays; a bigger GPU from Imagination Technology than the one used in the JH7110; USB3.0/2.0 (x4), full-featured Type-C supporting DP, PD and USB 3.2 Gen 2; PCIe 3.0 x8; built-in NPU (2 TOPS - Trillion Operations per Second) for artificial intelligence, which supports mainstream architectures such as TensorFlow; hardware security engines for AES / DES / HASH / PKA and China national secret algorithm; 4-channel digital MIC. CPU cluster computing cache coherence, via a built-in multi-core bus technology self-developed by Saifang Technology - Starlink 1.0. Starlink 1.0 has the characteristics of high scalability, low power consumption, low latency, and easy debugging. (delay can reach 13.5 ns, power consumption is only 0.27 watts).
The plan was for the JH8100 to be manufactured with a 12nm process (For comparison, VisionFive 2 uses a JH7110 and the RPi4B uses BCM2711, both of which were manufactured with a TSMC 28 nm process), the real question is can that happen SMIC (with sanctions, removing TSMC as an option). Maybe that will delay the exact specification being officially announced.
As well as keeping an eye on the JH8100 I'm also looking at the SiFive Horse Creek, which has no vector support (built by Intel Foundry Services on the Intel 4 process, aka 7nm process node):
SiFive P500 (RV64GBC) quad-core processor @ up to 2.2 GHz; 13-stage, 3-issue high-performance out-of-order pipeline; Each core has 32KB instruction + 32KB data L1 private cache and 256KB L2 cache ; Up to 4MB L3 cache in a quad-core cluster; SPECint 2006 score of 8.65/GHz; DDR5-5600 memory controller interface from Cadence; Intel PCIe 5.0 PHY with x8 lanes; Synopsys PCIe Root Hub Controller; I3C, Quad and Octal SPI, UART, peripheral DMA ; 19 x 19 standard FBGA Package ; Supports Ubuntu 20.04 with Linux 5.17.4.
The deal breakers for me would be if StarFive used a draft version instead of the ratified standard RISC-V extension, and if Intel tries to shove in a Intel ME chip (I do not want a chip in my CPU that can only run unauditable, encrypted and signed code updated by the vendor for a couple of years).
But the SiFive/Intel board should land sometime this year, the JH8100 SoC once announced will probably take another six months to a year and a half until it is on a board that can be bought.