Re: X86 could go open source
Anything could go open source, but often the embarrassment isn't worth the gain. In the last few years, we have been privy to some of intel's stupendously bad engineering decisions. Anybody peeking in wonders is it possible to run mission critical code on x86 cpus at all?
Case in point -- treat the L0 cache as a virtual cache. Unless you have spent time in this area, it is tough to parse, but the basic idea is this: in a physical cache, you have to wait until the mmu-hardware validates the address, loads its physical translation, then push that translation into the cache(s) to see if the memory is instantly available.
Many RISC architectures had recognized the latency in this, so used a virtual zero level cache, so they could spit the program address into the cache int parallel with the mmu, thus reducing the latency. These architectures used "address space identifiers" to segregate the virtual cache for protection.
Intel noticed that *most* of the time, the lower N bits of Virtual Address == lower N bits of Physical Address, so shipped a masked Virtual address into the level 0 cache at the same time as waiting for the mmu to respond. Thusly, they simulated the performance gain of a virtual cache, with the maintenance simplicity of a physical cache, at only the cost of surrendering the privacy of all programs.
Nice job.
