Reply to post: Re: How many Power Stations

Intel promises next year's Xeons will challenge AMD on memory, IO channels

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Re: How many Power Stations

They use micro operations.

Even the ARM1 used them:

The reason the decode is implemented in a number of separate units is because the ARM1 makes use of microcode ROMs (PLA). Each instruction is decoded into up to four µOP signal-wise. In other words, the ARM instructions are broken down into up to four sets of internal-µOP signals indicating things such as which registers to select or what value to shift by. For some complex operations such as block-transfers, the microsequencer also performs a looping operation for each register.

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