Reply to post: Re: am I the only one here who wrote RISC asm in the 1980's?

RISC-V needs more than an open architecture to compete

Anonymous Coward
Anonymous Coward

Re: am I the only one here who wrote RISC asm in the 1980's?

I did mention Patterson. Read the book when it came out in the early 1990's and though, finally, someone who had a clue. But based on RISC-V, it must have been Hennessy who wrote the good parts of the book

Here is the thing about RISC. It failed. All the huge claims made in the 1980's for RISC proved unrealisable. What happened was some of the more practical bits of RISC were folded into CISC's and those instruction sets have sailed on successfully ever since. The psychotic mess that is x86 was made super-scaler by the great AMD RISC'ish hack. PPC was about as RISC as the 68060. And so on..

MIPS was actually quite a nice architecture. At least for us lowly asm writers. SPARC was a mess. Register windows? Were nt they an idea that failed on a Burroughs mainframe back in the 1960's? Why are you trying to solve a problem with the instruction set that can be solved by the compiler. If the compiler can do instruction scheduling it can sure as hell do local variable liveness analysis. Actually they all do that as part of the optimization pass.

But as I look at the RISC V instruction set I just shake my head. So the 6502 and Z-80 I was writing for in 1978 had richer and more capable instruction sets. With less than 10K transistors..

There again it took x86 almost 30 years to get PC relative addressing. Something almost everyone else had since the 1970's. And the 1960's on the Big Iron.

And so it goes. Another decade, same old stupidities from decades past.

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