Reply to post: Re: 16 RISC-V extensions were ratified

Chatter around GPUs for RISC-V is growing

Bartholomew Bronze badge

Re: 16 RISC-V extensions were ratified

> Who or what is doing the querying?

Does it matter, ultimately the CPU is doing the querying!. RISC-V has three software privilege levels (in increasing order of capability): user-mode (U-mode), supervisor mode (S-mode), and machine mode (M-mode). If one privilege level does not have access, the function can always passed using a secure mailbox to a higher level to run and send back to the lower privilege level what that level is allowed to know depending on the code that was implemented by the designer of the system. What one OS chooses to do/allow may be different to others.

> But are you saying that the OS dynamically intercepts instructions?

That would be slow, it is a valid option, but not necessarily the best.

> Or the application queries on installation?

Travel far back in time when there was a chip called the 8087 which if present it could allowed floating point operations to be done in hardware.

Back in the 80's there were four options for programs that needed floating point:

option 1: Check if the chip was present, and if it was use it.

option 2: Check if the chip was present, and it it was not then exit with a error message that floating point hardware required was missing.

option 3: Check if the chip was present, and it it was not then use a software library to emulate what the chip could do only much much slower.

option 4: Check if the chip was present, then be lied to and told that the hardware is there even though it was not by having the check intercepted by a TSR (Terminate and Stay Resident) ISR (Interrupt Service Routine) , that captured all calls to use floating point hardware and emulated what the chip would do only much much slower.

For programs that needed floating point initially only the first two options existed, some companies added the third option, and others did not. And eventually the fourth option was added.

Me predicting what will happen in the future, I have honestly have no idea. I would expect the option as to what happens at run time to have previously been decided by the compiler options when the program is converted into machine code. I would expect if floating point hardware present in the CPU at runtime use that, if it is missing emulate the functionality in software.

e.g. RP2040 in hardware only supports integers, so the raspberry pi foundation have licensed a software floating point library ( https://www.quinapalus.com/qfplib.html ). In that case the compiler does all, you do not need to worry that the hardware is missing floating point functionality.

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