I can understand the ISA
I am reading through the risc-v spec on the webiste. It uses the same opcode mnemonics that I saw on the Prime computers, so LH and L for load Half and full register. I also missed the quad floating point on Prime, but this has been thought of. The Prime instruction set was also called 32I, because immediate mode was invented. It is very encouraging.
What's wrong with my thinking?
Biting the hand that feeds IT
