Re: It's more than a SmartNIC
Perhaps it's safer to say that what we're seeing are more and more chokepoints developing as data loads increase. As graphics demands grew and grew more diverse, specialized graphical chipsets gave way to slightly-more-generalized GPUs. When GPUs became more useful, they put a strain on bus demand, necessitating the still-evolving PCI Express bus to keep it fed.
Now in the network stack, we're kind of seeing the reverse. As throughputs continue to increase, latency becomes an issue because electrons can only move so fast, thus cutting down on trip times becomes a factor. Hearing about DPUs sounds natural to me: a way to take more and more of the I/O local in an effort to cut latency.
I'll be interested in seeing where the next chokepoint emerges. RAM and storage tech are still evolving at a decent clip, so it's touch to predict which one chokes first.