Re: Easy peasy, then.
I'm used to Canada and the USA, where SO LONG AS I USE UNLICENCED spectrum, I only need U.S. FCC (Federal Communications Commission) and Canadian DOC (Department of Communications) device-specific RFI and EMI certifications (i.e. FCC Class B device) that accepts external interference without damage and doesn't otherwise emit interfering EMI.
It's barely $20,000 to get the USA/Canada certifications and EU is another $15,000 per device class.
Not a big deal!
At 2.2 to 6 GHz depending upon the output power level, the 5G device range is starting from 200 metres out (i.e. with multipath interference from buildings/terrain) to as much as 5 km line-of-sight. At 60 to 80 GHz for high bandwidth 5G, the maximum range is around 300 metres and can't go through concrete walls or steel framed buildings very easily without severe signal degradation.
When you're using PC-101 boards, just stack them in a box and you're good to go.
Once you have FCC, DOC device-class certifications, we can give away the design as-is and you can use ANY COMPATIBLE CPU that has a base clock speed of 4 GHz (i.e. Any Ryzen-9) --- I like AMD CPUs because they have LOTS of PCI-lanes (64+) for me to sub-sample a fast waveform with 50-to-100 nanosecond time slices that I can interpolate and DSP to recover the original 5G waveform for data packet information that can be further interpreted as individual user network traffic.
AND since AMD Ryzen-9 CPUs are general purpose, I can simply update the SOFTWARE to create ANY sort of waveform interpretation ESPECIALLY for the upcoming 6G and 8G standards that are now in research! These boxes NEVER go obsolete so long as they have electricity and signal amplifications circuits on them that have decent capacitors that don't dry out on them! Since it is SDR (Software Defined Radio) I can simple reflash their BIOS to take into account ANY new and MULTIPLE of QAM-1024, OFDM, PCM, etc. etc. at the PHYS-level of the OSI communications stack!
This means I can do completely CUSTOM BASEBAND operating systems WITH quantum-computing resistant encryption (i.e. one-time pads, invariate, etc.)
Like I said, we've been working on this for a while using general purpose CPUs to do interleaved PCI-bus based communications signal input/output. We're in fact DONE and just need to release a CLEAN Open Source design that doesn't infringe upon the BASIC Qualcomm, Huawei, Intel, etc pooled patents portfolio (Which we HAVE DONE at the PHYS level!) We can release the PDF file vector design pretty much at any time.