"FFS just start making SRAM DIMMs already."
Are you implying that SRAM will fix the Cacheflow flaw?
a) on-chip cache is already SRAM for speed so putting it further away will slow it down significantly as latency becomes your main issue
b) as SRAM is already used for cache, the security issue wouldn't be addressed. Changing the CPU to not use cache-type structures to reduce latency will slow the CPU's down even more as they are left sitting waiting for responses from main memory for any memory operations.
c) massively increase RAM power/cost as SRAM requires 4-6 transistors per bit versus 1 per bit for DRAM.
Biting the hand that feeds IT
