That "weird" page-and-offset memory addressing was because the 8088, like the 8086, had a 20-bit address space but 16-bit registers. It was influenced (according to the iAPX 86 designers and others) by a desire to ease porting from 8-bit CPUs such as the 8008, 8080, and Z80; but in reality 16-bit registers were probably as large as was economically feasible.
I doubt it had anything to do with CP/M, aside from the observation that CP/M and applications for it would be numbered among the software packages Intel would expect people to port. They were primarily thinking at the instruction-set level, though; while they made some concessions for compiler developers, I doubt the designers spent much time considering specific applications.
It's worth noting that the 8086 was developed in part as a stopgap while Intel was working on the iAPX 432, development of which started in 1975. The 432 had a 32-bit address space but still used 16-bit registers because going all 32-bit at the microarchitectural level just wasn't feasible. Considering how ambitious the 432 was in other ways (a capability architecture implementing a stack machine with an extremely CISCy instruction set), that's pretty telling.
Biting the hand that feeds IT
