Where to start on this buzz word bingo?
Moore's law was an aspiration and it's not been plausible for 10 years or more. It's also been redefined downwards, so means whatever a chip maker wants it to mean.
Well, yes above 2 to 4 cores the I/O bottle neck to RAM becomes more serious. I've wondered if a RISC two core on a BIG chip with lots of RAM and a piggy back RAM (SC6400 family) on top with then multiple high speed serial I/O to an array of identical chips rather than 16 to 64 cores on one chip (like Transputer idea) is better.
I still think AI & ML is mostly PR and dubious for anything other than pattern matching. That's the underlying mechanism. It's a niche.
Is this TSMC PR?