Re: Floating point crypto operations?
Again, I find myself forced to defend Intel.
Gates are not free. Floating point hardware, in particular, was the most expensive hardware on the part when integer registers were 32 bits. Repartitioning the gates that were used for floating point computations was just common sense and EVERYONE did it.
On a context switch, floating point access was disabled. If you attempted a floating point instruction, you would take an exception. The OS would save the floating point registers to the context of the appropriate thread, and then restore the values that your thread needed. This is called "lazy".
I can only assume that "eager" means that the values are saved & restored on every context switch. The only way that this could be faster would be if almost every thread was making use of these registers. I call BS.
Again, this is barely a HW issue at all. When an exception occurs, the processor only needs to save two registers--and the OS is responsible for making sure that the place that they are stored (two special registers) is clear. Everything else is the OS responsibility. The architecture has NEVER claimed to be side-channel free.
Well, now we realize that we've been using these processors in a way that require them to be side-channel free. Oops.
Biting the hand that feeds IT
