Reply to post: Re: confused

Hold the DRAM phone: IBM claims phase-change breakthrough

Trevor_Pott Gold badge

Re: confused

Because 2 bits per cell at 64,000 cells is 128kbit. Kilobit. We're not talking 128GiB DIMMs here. We're not talking 4TiB PCM drives.

What we're talking about is a potentially useful high endurance write buffer for flash chips. Think about writing log files. Lots of tiny little changes that are definitely "sub-cell" in size, when we lok at writing all of that to a flash device. Logs can wear out flash in a hurry.

But what if you front-ended that flash with this PCM? Absorb the writes until there is enough change to require a full cell's worth of writes, thus optimizing the flash?

Physically, flash will occupy less space for some time yet. And never believe IBM regarding price. They aren't talking about PCM as being the same cost as bulk 3D NAND, but competitive with the most expensive SLC flash you can find, I promise you.

So the initial applications will be PCM as a flash cache layer until some refinements are made to packaging, temperature reliability and so forth. Basically, taking the SLC cache out of today's flash drives and putting PCM in instead.

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