Re: How is this "3D NAND" any different from stacked dies?
This 3D NAND process isn't stacking individual lumps of silicon, it appears to involve layering insulating material and new semiconductor substrate on top of a previous layer, etching and metallising that substrate, providing interconnecting vias through down into the previous layer and then doing it again as many times as they can get away with for decent device yields.
Biting the hand that feeds IT
