back to article You there, boffins and tech giants, take this $50m and figure out better chips

The US National Science Foundation (NSF) has enlisted a group of technology companies to help research the next generation of semiconductors. The idea is that, rather than tinkering with and improving existing designs, engineers and scientists look at new materials, tech and processes to work with, research that can then be …

  1. Yet Another Anonymous coward Silver badge

    Yes, the Chinese will never think of doing something like this, muhaha

    The advantage of Captialism is that this money will go directly to CEOs and shareholders (*) without being diverted by corrupt government officials

    * in the appropriate congressional districts, and assuming that campaign contributions have been forthcoming

  2. Will Godfrey Silver badge
    Unhappy

    A pretty good way to choke real innovation

    Tell the designers what they must design, without any understanding of what they are demanding - even if it's impossible.

    1. Dave 126 Silver badge

      Re: A pretty good way to choke real innovation

      Innovation has had many mothers, from the capitalists that built up the USA's manufacturing base at the beginning of the 20th century, to the US Gov's centralised command economy during WW2 and the Cold War which trained an unprecedented number of physicists and engineers. Real innovation can come from a man in a shed, or a team of mathematicians and telephone engineers in a shed.

      The point is, the technology we use today has been funded by both by government grants and capitalists investments, at all stages and at all scales.

      1. Will Godfrey Silver badge

        Re: A pretty good way to choke real innovation

        Steam engines and motor cars weren't designed by people instructed by government to find a better means than horse and cart.

        Nobody told the Wright brothers to design a plane.

        Transistors weren't invented by people being instructed to make an alternative to Valves.

        ICs weren't developed because the authorities considered discrete components too cumbersome.

        1. Dave 126 Silver badge

          Re: A pretty good way to choke real innovation

          I explicitly acknowledged the role of an individual's drive and curiosity in innovation. However, not all projects can be tackled by one person, or even two people such as the Wright bros. They could build a heavier than air flying machine, but to build a machine that can reach orbit requires teams and indeed whole workforces.

          The chronometer was invented by Hamilton to win a prize from the British Admiralty. GPS was created by the US gov for similar reasons.

          Sometimes people actually do find the things they are paid to find. And often they don't, but find things that turn out to be useful in unexpected ways. Sonetimes the project bears no apparent fruit but it trains people who go on to contribute importantly later in their career.

          1. Bartholomew

            Re: A pretty good way to choke real innovation

            > Sometimes the project bears no apparent fruit

            The L.A.S.E.R. is probably the best example of that. Everyone though that it was a truly marvellous invention, but one with absolutely no applications whatsoever when it was invented. Now just over 70 years later, it is literally impossible to imagine what the world would be like if the technology did not exist.

        2. KSM-AZ

          Re: A pretty good way to choke real innovation

          "ICs weren't developed because the authorities considered discrete components too cumbersome."

          Yes they were. (V)SLIC and component hardening was funded in large part by DARPA. As was the internet. It's always been both. NASA also funded tons of research into materials and such. Don't be silly.

          Now if you want to make an efficiency argument . . .

    2. martinusher Silver badge

      Re: A pretty good way to choke real innovation

      This is exactly what ChatGPT was designed for. They will require regular reports, here's a report generator.

  3. StargateSg7

    We beat them ALL to it BY DECADES!

    128-bits wide! GaAs on Borosilicate as a combined CPU/GPU/DSP/Vector Array Processor with built-in over and under microchannels for direct silicone oil cooling at 60 GHz (575 TeraFLOPS) and 2 THz (50 PetaFLOPS) per chip!

    We Win! Yay Canada!

    V

    1. bigphil9009

      Is this going to actually be released? Or is it like everything else you make up - complete vapourware nonsense?

      1. StargateSg7

        It will be an all-out blitz of Youtube tech-review channels that will review and espouse our products.

        We will be SELLING ON AN IMMEDIATE BASIS AFTERWARDS (i.e. We have LOTS of stock ready!) various models of ruggedized Smartphones, Tablets, Laptops, Embedded-Boxes and Desktop Workstations at more-than-reasonable Sub-$2000 prices that will just BLOW AWAY ANYTHING that Intel, AMD, ARM, IBM, SAMSUNG, APPLE has on the market!

        And since we have 100 Terabyte and Petabyte+ Solid State Hard Drives at sub-$1000 CDN prices, that will ALSO make more-than a few people in various executive suites SQUIRM with trepidation at our technological onslaught!

        We don't just have Super-CPU chips, we also have inhouse-designed-and-built reversible-consumptive-anode/cathode-process Aluminum-Sulfur batteries that have 8x the energy density of Lithium-Ion ready for sale, in addition to MegaWatt-Scale Acoustic-Wave Plasma Compression electrical power production systems that are the size of large home refrigerators whihc can be bought BY YOU for installation in your own urban or rural home/apartment which means NO MORE POWER BLACKOUTS. These devices can also be connected in-series for ENVIRONMENTALLY SAFE and QUIET City-and-Industrial-scale Terawatt-class electrical power production!

        Our final product IS THE BIG DOOZY ONE --- But that one is to be demonstrated LIVE and on-camera for all the world to see! We'll tell you later WHAT THAT ONE is!

        We Win!

        Yay CANADA!

        V

        1. bigphil9009

          So that's a no then. Just more insane ramblings - always coming soon, never actually arriving.

          I do see that you can list a whole bunch of YouTube channels though, so at least there's that.

    2. Anonymous Coward
      Anonymous Coward

      You keep on saying that this will be released, so where on the internet should people be looking for more information about this blazingly hot technology, eh ?

      1. StargateSg7

        Will be selling ASAP! Merely a little longer for you on your side of the pond!

        Design is set in stone! Chips are coming online with MASSIVE amounts of available stock!

        WATCH The following people who are getting FIRST SAMPLES and REVIEWS!

        Linus Tech Tips (CAN)

        Unbox Therapy (CAN)

        MKBHD (USA)

        Austin Evans (USA)

        MrWhoseTheBoss (UK)

        iJustine (USA)

        TheVerge (USA)

        Wired (USA)

        UrAvgConsumer (USA)

        Koji Seto (Japan)

        ITSub (Korea)

        AlexiBexi (Germany)

        LeoDuff (France)

        Hipertextual (Spain)

        SuperSafTV (UK)

        Simone Giertz (Sweden)

        Gaurav Chaudhary (India)

        Geekyranjit (India)

        Pedro Muanza (South Africa)

        Unbox Diaries (Phillipines)

        Mary Bautista (Phillipines)

        Loyat (Malaysia)

        Zbing Z (Thailand)

        Hardware Unboxed (Australia)

        FutureFive (New Zealand)

        Lester Chan (Singapore)

        Coisa De Nerd (Brazil)

        THEY will be "The First Ones" to get samples and be able to showcase and REVIEW EVERYTHING!

        GET READY PEOPLES! A lot is going to be happening in 2023!

        V

        1. Anonymous Coward
          Anonymous Coward

          @stargtaesp7

          Ye Gods. Do you know how to spout bollocks or what?

          By the way, what town is Canada in?

        2. bigphil9009

          For once we agree - a lot will happen in 2023 - some people will be born, some people will die. Some elections will happen somewhere around the world, a few movies will be released and also produced, but what will not happen, I predict, is that any of the nonsense that comes out of your mouth via your fingers will ever happen.

      2. StargateSg7

        Duplicate message oops...

    3. KSM-AZ
      WTF?

      Where's the beef? Er Fab?

      Running a RISC V core? ARM? GPU specs? Vector specs? Gallium Arsenide stuff has been around since the 80's. Fast and hot, but fabbing chips with a new process with the densities of today's cpu's would mean billion dollar fabs and esoteric processes, nobody has ever seen or heard about in Can-aid-i-a. We'll believe it when we see it. In the mean time TSMC is building a "Multi-Billion Dollar Fab" up the road a piece, that should usher in some 3 & 4nm parts from Arizona in a year or two.

      1. Alistair

        Re: Where's the beef? Er Fab?

        I'll agree that the sci-fi fantasy TV show might be a bit given to hyperbolic overstatement, but please realize we canadians do have a few nutbars about, and we have the patience and sanity to deal with them appropriately.

        However:

        In the mean time TSMC is building a "Multi-Billion Dollar Fab" up the road a piece, that should usher in some 3 & 4nm parts from Arizona in a year or twosix.

        FTFY

      2. StargateSg7

        Re: Where's the beef? Er Fab?

        No RISC-V instruction set is used as our GaAs chips use our OWN CISC (Complex Instruction Set Computing) commands and fully in-house design run at 60 GHz clock speeds with 575 TeraFLOPS of compute power using 128-bits wide Quad-Precision IEEE-754 standard which was tested with a University of Toronto-designed Floating Test Suite that SEVERELY STRESSES the floating point units especially in high-error conditions and transition points such as:

        Subnormal arithmetic

        Infinite arithmetic

        NaN arithmetic

        Zero and Near-Zero arithmetic

        These were all tested under MULTIPLE Canadian and European-designed test suites that are parallel and serial in nature.

        a) The Integer Units are the same 128-bits wide allowing Signed and Unsigned integer numbers also at 575 TeraFLOPS. At 64-bits wide it's a linear speed-up at over a PetaFLOP+ of 64-bits wide per value. At 32-bits wide, it's Four PetaFLOPS+ of integer number-crunching power and at 16-bits wide, it's EIGHT PetaFLOPS+ of massive integer number crunching horsepower!

        b) We also built-in a FAST hardware-accelerated CHARACTER STRING WILDCARD Pattern Search Processor that can search BILLIONS of strings per second where each multi-language character string can be up to 131,072 ASCI or UNICODE characters long at up to 16 bits per character! That allows for the coding of POWERFUL AND FAST natural language search, text processing and text translation systems.

        c) The Vector Array Processing System is fully SIMD (Single Instruction, Multiple Data at 16,384 bits wide or ONE instruction operating on up to 128 operands PER clock cycle!) and MIMD (Multiple Instructions, Multiple Data at 16,384 bits wide which can handle 32 separate/different instructions operating on up to eight 128-bit operands each in one clock cycle) on up 128-bits wide Signed and Unsigned Integer values plus Floating Point and Fixed Point Real Number Values!

        d) The GPU system is SIXTEEN SEPARATE BANKS of 16,384 by 16,384 pixel frame buffers where each frame buffer pixel is 128-bits wide with user-selectable four-channel RGBA, YCbCrA, HSLA, CIE-XYZA, CIE-LABA, YUVA and other pixel formats processed at 32-bits per channel but downsampled to 16-bits per colour and alpha transparency channel for final display.

        Pixel operations on each GPU pixel frame buffer are FULLY-SYNCHRONOUS with fixed 4 Millisecond load and process times with SIXTEEN layers of user-defined full-frame image processing which allows for one-step combined HSLA Enhance + RGB Colour Correction + Contrast Enhance + Anti-Alias + Composite + SOBEL/CANNY Edge Detection + Many Convolution and Image Filters + Vectorization + Object Tagging all done WITHIN those four milliseconds of processing and display allowed per frame.

        This allows us to record or display up to 240 frames per second at 16k by 16k resolution that can be output-to and recorded-from 16 separate channels (i.e. you can use 16 monitors or cameras at 240 HZ frame rates for output onto an eight-display 360 degree surround-view display array OR we can support an eight-monitor Stereoscopic/3D Display or 3D Camera setup at 120 HZ for 3D surround-view operations! Each video frame can have 8 channels (i.e. 7.1 Surround Sound) of 32-bits wide audio samples at 256 KHz sample rate for super-wide-bandwidth audio quality.

        d) YES! We use ESOTORIC processes GaAs on Borosilicate Glass with etched and stamped microchannels built in underneath and overtop the GaAs circuits. This super-cooling technique was pioneered at the University of Alberta in Edmonton, Alberta, Canada in the 1990's! We have NO dependence on ANY 3rd party to supply chip making gear. Everyone else has to use the Netherlands-based ASML but we don't! (i.e. ASML is the chip stepper/etcher manufacturer that Intel, AMD, Global Foundries or TSMC all have to use BUT WE DON'T because we designed and built ALL our chip-making systems fully-inhouse and are fully ITAR-free!)

        We can Electron-Beam down to 8 nanometre separation of line traces (GaAs line trace themselves are 280 nm wide while our CMOS line traces can get down to 8 nm wide) where we can create an entire GaAs chip in mere minutes using over ONE MILLION+ ELECTRON BEAMS (1024 by 1024 array) at once and layer the chips themselves up to 4096 layers! We put into each chip our in-house designed non-volatile K-RAM (i.e. Capacitive-Difference-State-RAM) as super-fast Level-1-to-Level-3 cache AND as main system memory on the same chip (up to 16 Terabytes of K-RAM per layer!) --- No need for precision stepper systems as we can simply burn the chip traces all at once on one 50 mm by 50 mm SQUARE BOROSILICATE WAFER (4 mm thick is each borosilicate glass substrate) using a fully-environmentally-sealed, no-human-touches-anything assembly line that gets machine-vision checked at all steps along the way to ensure high chip yields. Since we don't use silicon wafers, Borosilicate Glass is much cheaper and faster to use as the BASE substrate and the GaAs layers are etched and filled-in using high-precision e-Beam technology and thin-film vapour deposition which is very viable as our line traces are 280 nm wide and much larger than current CMOS-based chip manufacturing processes.

        e) We use 16 separate processing core layers for the SIMD/MIMD Integer processing, 16 processing core layers for the SIMD/MIMD Floating Point real number values, 16 processing core layers for the Fixed Point real number values, 16 processing core layers for the greyscale and Colour Pixel processing and 16 processing core layers for the CHARACTER STRING processing and 16 processing core layers for the Boolean State Decision Tree processing and 16 Layers of 16 terabytes each worth of lockable/separateable Global Shared System Memory. Each processing core layer is separate from all others and can computer ASYNCHRONOUSLY or SYNCHONOUSLY as needed so that cooperating with all other layers if needed is possible or one can process data separately and hidden from all other layers.

        Each separate processing core layer has SIXTEEN SEPARATE BUFFERS where each buffer is an array of 16,384 by 16,384 values that can be up to 128-bits wide to allow for multi-operand processing and compositing of array values. This chip is OPTIMIZED for Array Processing and you can consider that each layer is a SEPERATE SIMD/MIMD processing core system that processes data all-at-once so this means our chip is technically an 96-core processor (96 separate layers of data-type-specific processing). Each core technically has thousands of separate "threads" that process all the buffer data as SIMD or MIMD instructions that finish in a fixed-time hard-interrupt-based manner in order to support multimedia and sensor-based systems that have fixed time limits for processing. At the Operating System Level the end-user sees 96 separate processing cores where each core has 1024 sub-threads that handle up to 256 operands per clock cycle. This is a MASSIVELY PARALLEL combined CPU/GPU/DSP/Vector processor super-chip that does EVERYTHING FAST!

        Since we are a lareg chip area-wise we must SANDWICH MULTIPLE layers of GaAs circuitry togethery separated by a in-beyween micro-channel-based cooling system that quickly wicks away the heat from all those the 60 GHz clock speed operations. Each chip is about two inches by two inches in size.

        V

        1. StargateSg7

          Re: Where's the beef? Er Fab?

          CONTINUED FORM ABOVE ….

          f) Each processing core layer has 64 input channels and 64 output channels of 32-bits wide General Purpose Analogue Signal I/O which are sampled at 32-bits per sample used for Audio, Video, Radio or Instruments and Sensors-based operations. This facilitates SDR (Software Defined Radio), multiple environmental sensors for vehicles, home appliances and industrial automation or robotics. It facilitates multi-axis CNC-machining and metal and plastic 3D-printing and supports multimedia recording/playback/triggering networks and systems consisting of MANY cameras, microphones, musical instruments, lighting systems, machine sensors, industrial instruments, robotic armature and definitely moves self-driving and self-flying vehicle control many decades forward!

          g) In terms of onboard PCIe-like digital communications lanes, we don't actually use those because EACH processing core layer is connected to the other layer via a Multi-Star Network Topology that used hardwired Dense Wave Optical connections at multi-Petabit speeds of Ethernet-like FRAME-based communications. This multi-star internal optical communications setup means each layer can communicate with ALL other layers in full-duplex at high-speed. For external communications, there is a Dense-Wave full-duplex fibre-optic connector on each layer to allow each processing core layer to communicate INDEPENDENTLY with external devices and also allows the global shared memory layers to act like SEPARATE K-RAM-based global memory storage units allowing for the creation of Extremely Large LAN/WAN-based Grid Processing Networks of many external devices cooperating together to form Virtual Supercomputers at multi-Petabit networking speeds!

          h) Security-wise, we have built-in anti-Quantum Computing SHOR's algorithm resistant encryption for ALL system K-RAM where EVERY data block in memory and cache is ALWAYS ENCRYPTED and has an added security/privilege/priority level signature at all times! This PREVENTS in-memory and file-based scanning since ALL data blocks are always SEPARATELY encrypted and this also separates out End-user in-Memory and File-based Data away from Internal System/Operating System data AND separates application-specific instruction sets/microcode from all other apps which are ALWAYS SAND-BOXED away from each other. ONLY those apps that have the required security/privilege level or specific Group Identifier can communicate or share data with each other. No other application can interfere or control another without the requisite permissions or proper group identification credentials! This also means race-conditions cannot happen since each app is completely separate and runs in it's OWN memory-space and their OWN processing thread.

          i) We also CHOSE GaAs (Gallium Arsenide) because of our 60 GHz clock speed requirement and because of the fact that CMOS chip production is extremely COMPLEX due to the expensive and time-consuming DOPING and EUV lithography processes needed to bring out specific chip qualities, especially at modern sub-10 nm line width processes. The 280 nm line trace widths of GaAs on Borosilicate Glass wafers make our chips very large area-wise BUT MUCH EASIER AND FASTER to manufacturer error-free using large-array electron-beam technologies.

          Our chip fab cost less than a few hundred million CDN to make (located in Vancouver, British Columbia, Canada) and we can make tens of thousands of chips at a time IN MERE MINUTES using Arrays of Electron-beam Arrays. Our tablets, phones and laptops are THICKER and heavier than other systems BUT WE are the only ones to have 128-bits wide computing with hard drives sized from 100 Terabyte up to multi-Petabyte SAN drive arrays with full dense-wave multiplexing-based Multi-Petabit fibre network connectivity built-in and

          all networking fibre-connectors are RUGGEDIZED ball-swivelling optical connector technology that use Dense Wave Multiplexing (DWM) using multiple frequences of laser light full duplex at multiple PETABITS PER SECOND!

          j) We also design and manufacture in-house multiple types of RGB-laser emitter monitors/video displays that are also Borosilicate glass panels which are 1:1 aspect ratio stereoscopic-capable 16,384 by 16,384 pixels (i.e. 64-bit RGBA colour display). We also make 16:10 aspect ratio video production displays at 16,383 by 10,240 pixels at 64-bits RGBA pixel (16 bits per colour and alpha channel)! Each display is connected-in-series to each other via simple and short fibre-optic cables and high-speed fibre-connectors

          k) AND FINALLY, for the A.I. and Neural Net/Expert System programmers, we also created a MASSIVE ARRAY-based hardware-accelerated Multi-State Boolean Logic Decision Tree system which uses 256 SEPARATE buffers of fixed-width BOOLEAN RECORD TYPES organized as an array[ 0..255 ] of 16,384 by 16,384 boolean records that each contain multiple 8-bit boolean values and multiple 128-bit identifiers and action-code fields that contain the following information to create vast decision trees that can interpret hugely variable real-world and virtual-world conditions and runtime states:

          Boolean_Record_Type

          {

          // Decision tree boolen states used to decide left/right fork-in-the-road and other branching decisions in an Expert System or Neural Net

          Current_Boolean_Value,

          Previous_Boolean_Value,

          Next_Boolean_Value,

          Final_Boolean_Value : 8_Bit_Boolean_Value;

          // Current operational status codes using in error-processing and operational-state-based decision-making

          Current_Status_Code_Value,

          Previous_Status_Code_Value : 128_Bit_Signed_Integer_Value;

          Current_Error_Code_Value,

          Previous_Error_Code_Value : 128_Bit_Signed_Integer_Value;

          }

          The individual Boolean state value can be one of the following types:

          1) Multi-State Decision:

          ABSOLUTELY_TRUE

          LIKELY_TRUE

          POSSIBLY_TRUE

          BOTH_TRUE_AND_FALSE

          ERROR_NO_BOOLEAN_STATE_CAN_BE_DETERMINED

          ERROR_BOOLEAN_STATE_HAS_CUSTOM_ERROR_CODE

          ACTION_INTERPRET_CUSTOM_STATUS_CODE

          NEITHER_TRUE_OR_FALSE

          POSSIBLY_FALSE

          LIKELY_FALSE

          ABSOLUTELY_FALSE

          2) Weighted 101-state Shades-of-Grey value

          0% to 100% percentage-based numeric value

          3) Weight 201-state integer Shades-of-Grey value

          -100 to +100 where negative values are error-levels, 0 is none, nothing or unknown and positive grades are good values.

          4) Weighted 11-state Integer Shades of Gray value

          0 to +10 integer value where 0 is none, nothing or unknown and positive grades are good graded values.

          5) Weighted 21-state Integer Shades of Gray value

          -10 to +10 integer value where negative values are error-levels, 0 is none, nothing or unknown and positive grades are good values.

          6) Weighted 3-state value system

          -1 to +1 where -1 is bad; 0 = none or unknown; +1 = good

          7) Simple two-state boolean state values

          TRUE/OFF or ON/OFF or ONE/ZERO or YES/NO

          By having 256 separate buffers each processed in-hardware using 16k by 16k worth of boolean values, it means 256 separate decision trees can be iterated through ALL-AT-ONCE OR SERIALLY in order to create fancy and faaaaaaaast-acting/real-time Neural Net and Expert Systems for natural language processing and general artificial intelligence applications. These extensive Boolean State record types allow for VARIABLE NEEDS in decision-tree creation so that neural net and expert systems can be easily developed, trained, deployed and maintained.

          Again, WE WIN!

          YAY Canada!

          1. bigphil9009

            Re: Where's the beef? Er Fab?

            How do you find time to write all that tripe?

  4. martinusher Silver badge

    Everything is predicated on 'them' being inferior

    It doesn't matter what it is -- chips not from China, tanks to Ukraine, you name it and the implicit assumption is that 'they' -- the other -- is inherently inferior to us so we only need to mention that we're doing something and the opposition rolls over and plays dead.

    The idea gets especially ludicrous when you see the sheer number of Chinese people working in the US. Obviously they're all naturalized, loyal Americans (and many are nth generation) but the one thing you can say about China is that "there's plenty more where they came from". So assuming that Chinese people here are roughly the same as Chinese people there -- you don't get a sudden boost in intelligence when you get that naturalization certificate (its just a piece of paper.....) -- then there's a lot of grounds for thinking we're doomed.

    But then its only $50 million. Just a few schools or a bridge or two.

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