Non-binary DDR5 is finally coming to save your wallet We're all used to dealing with system memory in neat factors of eight. As capacity goes up, it follows a predictable binary scale doubling from 8GB to 16GB to 32GB and so on. But with the introduction of DDR5 and non-binary memory in the datacenter, all of that's changing. Instead of jumping straight from a 32GB DIMM to a 64GB …
This all sounds like a good idea that they are selling us. Or is this a cunning way to re-use partially failed memory chips?
The non-binary idea is plausible but it could be the memory makers are sweetening their bottom line by using chips that, in a binary world, would have been consigned to the scrap bin.
Those of us old enough to remember EPROMS and static ram chips will know that this is not a new idea.
It's a new way to excuse charging you more for less, that's all. In DDR specifically, the "difficulty" comes AFTER 128GB only due to physical size. This has been stated over and over for at least a decade. That said, there's various options for 256GB+ and maybe those are worth looking at to make cheaper Vs. sticking it out with DDR.
I had the dual core version of that....
Which then leads me to wonder, if it's parts binning to use chips that fail QA could we do the same I did with said AMD dual core and unlock the locked memory to get more bang for buck at the risk of toasting kit? (for the record mine only died a few years ago after 10ish years of service - so not a bad buy all things considered)
This is a non-issue.
All silicon devices have yield problems due to defects that occur during manufacturing. Various processes are used to minimise the impacts of such losses on production, since lower yields drives up device costs.
On RAM devices, at the design phase, additional columns are added to memory devices and then during the post manufacturing test phase the devices health is assessed and there is a one-time process that blows fusible links within the chip to permanently disable failed columns, hence disabling them. After that, some of the spare columns are configured, again with fusable links to make them assume the address of the failed column, thus resulting in a fully functional device again.
As density increases, the number of failures on a device will increase fairly linearly. I guess it now makes more sense to map out larger regions and this results in the approach detailed in the article.
There is nothing wrong with this. The same technique is used in widely in the industry. Some examples are
CPU's are shipped with complete cores disabled when they failed during manufacturing and nobody cares since they get a cheaper CPU.
The same approach is used on EEPROM (NAND and NOR types), although the process differs. NOR flash (the more expensive ones) are shipped defect free and has the same approach of mapping out bad pages with some spares that are already present in the device.
NAND flash (i.e. the cheaper one) are shipped with defects present and visible and a process to allow the host processor to determine where the bad pages are and manually map around them. On Linux and embedded systems, there is the Unsorted Block Image File System (UBIFS) that handles this process. To ensure that the bad block map its self is reliable - since failures can statistically occur anywhere, the same approach of replacement pages is used on a small number of the first pages in a NAND flash, again to ensure increase yield.
Similarly, hard discs (of the spinning type) use the same approach with some spare sectors, these are placed in a number of regions across the disk surface so that fairly similar seek / access times can be achieved. Again, these are silently mapped in as bad sectors occur or grow on the underlying media. You can see this in the SMART metrics for the discs.
SSD's use the same approach as EEPROM's listed above.
I'm sure there are other examples, but this is just the list of what springs to mind. So, nothing to see here other than higher yields and lower costs for everyone, which is a good thing.
Binary = One / Off - 0 or 1, Hugh State or Low State, etc a value comprised of one of two states.
Powers are the multiplication of a given Integer. In this example it will be the Power of 2. -- 2, 4, 8, 16, 32, 64, 128 etc
RAM 'capacities', which is the subject of the thread, come in Powers of 2...
RAM capacity is a given quantity of Binary States ... for example 1024k of individual binary states.
The usage of the word Non-Binary has no reason to be in the title, it is being incorrectly used as the subject thread is about RAM Capacity not individual memory location states.
Further examples: the values of passive components like resistors and capacitors were chosen so that every built component fitted with the tolerance range of at least on of the catalogue values. Just make 'em and test 'em. If you wanted a precise value you were simply paying for the time to rummage through the batch for one that happened to be close enough.
There's some lovely examples of the opposite. Fast ADCs vere made accurate by laser trimming the resistors in the divider chain to correct values. Every single one comes out a beaut. I've seen trimmed capacitors too, sanded down at the edge until they are the correct value.
There was a time when it was considered possible to use FIB machines to image and repair silicon coming off the production line. If a gate wasn't quite right, rebuild it. It was briefly considered for flat panel TVs too but the raw yield became so good anyway it wasn't worth it.
Thank for the explanation, for me a 'gammon' means one of those. . I learnt about them when reading a book about the 3 and 4 SAS. SAS improved the devices by including any piece of metal (nails, screws, scrap metal) in the plastic explosive making it a devastating anti-personal grenade.
The URL filtering in Chrome uses block- and allow-lists, rather than black/whitelists.
If anything, it's a more descriptive name.
Do you actually believe that anyone had a problem understanding what a Black List or Whitelist relates to ?
"If anything, it's a more descriptive name."
If we want to use correct descriptive names should we then refer to people with their correct colours.. For example I am extremely pale brown person...
Should a lighter black person be called a grey person ?
Let's stop with the overly PC please, it really doesn't help anyone and it won't change the results... Unless you have proof of the contrary.
"Since it's not inherently obvious"
Don't be disingenuous, it's unbecoming.
Dark means night, dangerous. Light means daytime, not so dangerous. It's been that way since all of humanity had dark skins and were dodging sabre-toothed cats and other similar nocturnal hazards.
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Recently-posted escaped benchmarks [Tom's Guide] suggest that Apple is trying out 4x24GB stacks in its purported M2 Max package.
Apple has some MacBooks with two 12GB chips as alternative to one 8GB or two 8GB chips. Same principle. And definitely NOT binned larger chips, because they don’t use anything larger. In the Pro, Max and Ultra they just have lots of 8GB chips that might all get a 12GB alternative.
When you read relevant threads, some people seem to have severe OCD triggered by these chips.
Did I miss the point of this article, or is this just a lot of words to say that some DIMMs will come in off-size increments? The subhead makes it sound like the new CPU tricks Intel is up to with their disabled capabilities until you buy a license.
And what's the deal with the "non-binary" terminology? That seems like a Big Title With Implications for what is really just a packaging trick at the factory. I would think "non-binary" would be tri-state memory, right?
I must be missing something...
At these enormous capacities, this doesn't seem (to me, at least) like a big enough issue to warrant taking over such a phrase as "non-binary memory". I mean, if they were talking old school 1536 bytes per chip vs 1024, that might be noteworthy, but at these huge sizes it all gets sort of nebulous anyway once you round it to the nearest whole number and tack "GB" to the end of it. "Non-binary memory" as a phrase should be kept for something truly earth-breaking, IMHO.
The problem is that you really don't want to switch to HDD or SSD, because that will never go right. The only reason why you would still want to swap is that some memory is actually not used by applications. Basically: if you really run out of memory that is required for calculations then everything grinds to a halt: you either get disk trashing or you simply get an error. Compare that with a lack of CPU power: everything goes slower, but that scales more or less linearly (more or less since current processors do not allow you to boost indefinitely with normal cooling). So yes, you do want to make sure everything fits into memory and leave some spare memory for disk caching and the like.
"more or less since current processors do not allow you to boost indefinitely with normal cooling"
The AMD ones do. It is the Intel ones that can only boost for a set period of time. At least it was this way up until... 12xxx? I'm not sure if still is true now. But up until very recently, it was.
I have two Ryzens 5600x. One of them liquid cooled, but the other uses now a good old Coolermaster Hyper212 as cooler - and it used the one that came with the CPU before.
Both of them hit thermal stability pretty fast, and after that they dance around the max clock, going up and down about 50MHz or so. The air cooled one reaches thermal stability in about 2 minutes after load. It stays at about 4420MHz in all six physical cores, at 79C. Funnily enough, the water cooled one reaches stability at about 69C - but runs much slower, at about 4300MHz. Must be the CPU binning, or the mainboard - as they are different models. This I just tested now, with and ambient temp of about 28C.
But, yes. The 5600X have a turbo speed of "up to 4,6GHz", and a nominal speed of 3,7GHz. Keep in mind that the turbo speed is measured with only one core running. I am getting 4,3 GHz on all six, with air cooling. Constant. I have rendered things that took hours, and the clock didn't change.
If anything, more choice in DIMM size helps you to have excess memory. If you're speccing a workload that needs (eg) 15GB, having the option of a 24GB kit will still give you headroom, while being cheaper than the 32GB you'd have had to go for otherwise.
(Or if you're a BOfH, you buy the 32GB kit, then swap it for 24GB and pocket the difference)
This is really saying that demand for ever-larger DRAM is softening in a historic way. If the demand was there, then they would keep making ever-larger chips and their customers would buy , whatever the cost, as has always historically been true. DRAM OEMs and vendors will make and sell whatever their customers are buying. Statements like:
"Doubling of DRAM capacity — 32GB to 64GB to 128GB — now produces large steps in cost. The cost per bit is fairly constant, therefore, if you keep doubling, the cost increments becomes prohibitively expensive," Lam explained. "Going from 32GB to 48GB to 64GB and 96GB offers gentler price increments."
have never not been true. In fact, cost-per-bit would historically be higher for the largest chips. So what we're seeing is a serious flattening of workload DRAM needs, from a nearly exponential curve as bigger data processing gobbles every byte you can throw at it, to linear or less. And maybe GPU compute is hitting the mainstream, so more of it at higher speed is baked into those rather than the base platform, instead; I haven't seen the statistics on that, but it wouldn't surprise me if ML was making major inroads into the more traditional server market. Insanely high SSD disk access times must be tilting the cache-vs-storage tradeoff these days, too.
Or perhaps this is just a sign of the gathering post-pandemic tech recession, but even in previous tech recessions, the OEMs always told their customers to suck it up and buy larger, since workloads only perpetually increase.
(In desktop/laptop computers, this seems to have played out years ago; 8-16GB has been the norm on systems since 2017, and shows no signs of budging.)
I think the significant thing is proliferation of memory channels - somewhat discussed in the article but not fully tied in to the price step point you quoted.
With a 2S Genoa EPYC system, you want to have 24 DIMMs exactly, so the only lever you can pull is per module capacity. Doubling means spending (and getting) 2x. Earlier systems with fewer channels but more DPC would allow you to add a second bank of half size modules with a negligible performance penalty, especially when crossing past the largest RDIMM to LRDIMM, versus the impact of not being balanced across memory channels.
It’s long been the case that most systems do not need to be maxed out with RAM - like with the desktops you mentioned, the memory per core for general purpose compute has been relatively stable in recent times, but as the core counts have continued to climb rapidly the total demand for memory in those boxes is still going up, and memory hungry applications have continued to get larger and more numerous (note the trend in the highest ratio of core:memory on e.g. AWS instance types over time).
But that lithography improvements have been slowing down, so rather than wait long enough to double the number of bits in a "standard" (i.e. sweet spot manufacturing with lowest cost per bit) memory chip, they are making chips where they only increased the number of bits by 1.5x.
It is basically a stopgap, so e.g. instead of waiting a full four years to double the number of bits they will give you 1.5x the bits in year 2 and then give you the 2x bits in year 4. Then from that point maybe you get 1.5x bits in 2 1/2 years and 2x bits in 5 years.
Yes, I know address lines are binary. The problem is that my brain isn't. It's that network speeds and hard disk drives are now all using 1 GB is 1000 x 1000 x 1000. Let's quit this nonsense now and let everybody have more memory.
Here's a handy little table:
1 GiB = 1.07 GB
2 GiB = 2.15 GB
4 GiB = 4.29 GB
8 GiB = 8.59 GB
12 GiB = 12.88 GB
16 GiB = 17.18 GB
24 GiB = 25.77 GB
32 GiB = 34.36 GB
48 GiB = 51.54 GB
64 GiB = 68.72 GB
96 GiB = 103.08 GB
Everybody except the memory producers are using the correct system now, let them be next. This is the best time for it. Or at least let them use 1 GiB. Because I'm getting tired of having to explain if 1 GB of data is using 1 GB if it is in memory and more than that on my drive.
I have no problems with any base, but memory sizes don’t use base 2, they use base 1024. They are the only place where base 1024 is used. Gigabit Ethernet is one billion bits per second, not 1024^3.
So if you can’t handle base 1,000, step away.
Yes, I know address lines are binary. The problem is that my brain isn't.
Your brain isn't decimal either, you just think it is due to more exposure to decimal in day to day use. If you had grown up Mayan base 20 would be "natural" to you, if you were Sumerian base 60 would be.
"Everybody except the memory producers are using the correct system now"
Some other marketing departments are trying to to convince us that we should be using similar decimal values because they can sell smaller quantities of bits for higher prices and claim to have higher capacity than their competitors.
To be fair, the entire PDP-10 line could use from 1 to 36 bit bytes at the whim of the programmer.
For example, ASCII was usually stored in 4 8-bit fields (7 for ASCII, 1 for parity) per 36 bit word, leaving 4 bits at the whim of the coder (see: SAIL's SAILDART archive system [WAITS on PDP-10], for example).
Hard nope on that. Memory is addressed in powers of two so sizes should be powers of two.
There's no such requirement for flash or HDDs which have specifically lossy medium with error correction and sector reallocation which means address space no longer corresponds to size.
3+ weeks ago, Micron let Linus from LinusTechTips loose on their development production line on a weekend and let him make his own sticks of DDR5 RAM. At least the bit of the process where the DRAM chips get stuck on the PCBs, anyway. When they POSTed, the sticks read as 24GB each. I assumed that it was a prank (they'd also made some labels saying that it was DDR9000 CAS 69) and somebody had fiddled the SPD data on the sticks. However, 24GB capacity fits perfectly with the 8 chip sticks he was making if the chips are 24Gb ones.
Fine by me. On the lower end of things, there's all these systems with like 4GB or 8GB or whatever soldered on + 1 DIMM slot, I have 20GB in my system right now (4GB soldered on + 16GB DIMM). I already had the DIMM but if not, I really wouldn't mind getting 4GB+12GB in a case like that and saving a little cash. And 8GB soldered + 24GB would get you a nice 32GB total. It theoretically troubles me that having one DDR4 soldered on means I cannot get that sweet sweet dual-channel speed, in practice I've found this to make little difference on the 2-4 core CPUs that ship in these systems with soldered RAM.
Asynchronous dual channel's been common for at least five years, too, at least on enthusiast/workstation boards. It's not a RAID-0 like classic dual-channel, but when accesses line up across differently sized chips, it still can be. I doubt Windows or Linux try to optimize memory placement to the widest segment, but on the other hand, I doubt enough people are running apps that have a noticeable benefit from multi-channel access on a system with soldered DRAM.
Sucks to be us.
So they've finally figured out what to do with the half-failed dies they've been throwing away thus far?
I personally wouldn't trust them, but if the savings are plentiful enough, I'm sure the average home user will jump at the opportunity to save a bit of cash even if it leads to reduced stability.
I mean, from a technical on-paper perspective this is probably an achievement. Possibly a chance to make use of binned dies and not waste chips, and a chance for manufacturers to fit machines with the amount of RAM they intend.
From a commercial prospect however, I look to my reseller/box-shifter needing to hold multiple variants of a "lifespan commodity" and them likely feeling increased risk in doing so. Combining with the physical cost of stocking additional lines, I expect not only no saving here, but perhaps a cost bump to the average end-consumer in reality, if these off-size DIMMs ever actually make it to the consumer market?
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