Finally a potential brake on the general computing apocalypse we're sleep walking into with the way M$ is abusing UEFI
RISC-V International emits more open CPU specs
RISC-V International has grown its pile of royalty-free, open specifications, with additional documents covering firmware, hypervisors, and more. RISC-V – pronounced "risk five", and not to be confused with the other architecture of that name, RISC-5 – essentially sets out how a CPU core should work from a software point of …
COMMENTS
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Thursday 23rd June 2022 13:50 GMT Jason Bloomberg
Re: V or 5
Even though I know it means "five" I still pronounce it "vee" or no one knows which is being talked about.
And as V is the Roman numeral for 5 I don't see the problem with using "vee"; "RISC Five" is the RISC five chip labelled "RISC-5", "RISC Vee" is the RISC five chip labelled "RISC-V".
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Thursday 23rd June 2022 16:13 GMT Anonymous Coward
and the inter-web melts in China, Russia, Iran, Cuba, North Korea, ...
The major selling points of the Swiss based RISC-V International's technology, are the spec's, reference designs, test suites, compilers, Linux kernel modules, toolchains, ... are all outside US, EU, UK, Japanese, Korean, ... sanctions, despite being developed in the West.
The inter-web well may melt, in the coming weeks, national firewalls permitting, as every engineer in China, Russia, Iran, Cuba, North Korea, ... downloads a set of the latest free Swiss specs, associated reference designs, and toolchains. As many a replacement T-90M battle tank is needed, with non French fire control systems, drones without Japanese electronics, ... . Which many an enterprising local, and likely Government funded startups, will likely start to assemble the free modules into sanctions avoiding alternates; ensuring the architecture has a future.
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Saturday 25th June 2022 07:17 GMT Anonymous Coward
Re: and the inter-web melts in China, Russia, Iran, Cuba, North Korea, ...
Open Source makes things legal to copy and develop. If you don’t care about being legal, you can pirate anything you want (x86, ARM, etc)
That’s before the obvious point that designing a CPU ISA is something any undergrad could do…