IBM lifts lid, unleashes Linux-based x86 killer on unsuspecting world IBM is mounting its strongest challenge yet to x86 hegemony with the unveiling of its spanking new Linux based S822LC system. What makes this system different is that it’s based on a new processor/motherboard configuration, complete with a sporty NVIDIA NVLink connector. According to my research, close to half of you HPC users …
No idea what it is, what it does or what it could be used for but it sounds amazing.
The IBM Power Systems S822LC Technical Overview and Introduction Red Book has the following on page 12
THIS PAGE INTENTIONALLY LEFT BLANK
so we know this is a serious bit of kit, I want one (whether it plays crysis or not)
http://www.redbooks.ibm.com/redpapers/pdfs/redp5283.pdf
I don't know whether this is the intended effect, but I find this rather helpful when making copies of something. Doesn't leave you puzzling (and shuffling paper) trying to determine whether that page is supposed to be blank or the copy machine fucked up again, especially on double-sided jobs.
It's for when you print a document which is designed to be put in a ring binder which has tabbed dividers to allow sections to be found quickly. With the "blank" page, a new section is guaranteed to be forward facing. It's also used to allow sections to be replaced within a document easily after printing. Cap 670 comes out at a couple of inches when duplex printed, so the liklihood of someone printing it and wasting paper with a "blank" is quite low. There is a section in there explaining how to organise the doc (which is made up of several "books" into a large binder which should be kept at the ATC.
I'd recommend it as a good read, but it's almost entirely non-IT so unless you're really, really into air traffic then probably give it a miss. ED109A is a good IT read though, but expensive.
Do I win king of nerds for enjoying regulatory documents?
It's for when you print a document which is designed to be put in a ring binder which has tabbed dividers to allow sections to be found quickly. With the "blank" page, a new section is guaranteed to be forward facing.
I'd always understood it to be for selective printing - i.e. you have a 100 page document and need only chapter six at 50 pages - you can print and bind that separately without messing up the pagination. Also works if you need to break the document up into volumes because of limitations on binding capacity.
@Lusty
"Do I win king of nerds for enjoying regulatory documents?"
Yes, you do, and I'm glad you are, since this is another lifetime puzzle solved... Have an upvote... :-)
It's obvious when you explain it, but I guess it just never occurred to me that someone would want to print something which is already on paper in front of me - I hadn't considered the electronic versions.
"It's for when you print a document which is designed to be put in a ring binder which has tabbed dividers to allow sections to be found quickly."
I thought so.
In layman's terms, they want sections to always start on a right-hand page. When printed out under normal duplexing, right-hand pages are always odd. "Intentionally blank" pages are always even (left-hand) and would be covered by the divider when someone picks up the tab and flips it.
at my first proper computery job they had two IBM 8100's (serious bits of kit with 10 meg hard drives), one for development and one for production, both were commissioned at the same time.
The IBM engineers had assembled the manuals for the dev machine (they filled a full height double fronted metal cabinet) and my task was to assemble the production machine manuals so that we had two identical cabinets filled with identical manuals.
This was where I first saw 'this page has been left intentionally blank' message, I queried whether I had to include these pages and the explanation was as Lusty pointed out, it tickled me that they still put those pages in a pdf document.
I've always felt they should use small type at the bottom of the page to say "The relative blankness of this page is intentional, for formatting reasons, and should not be construed to indicate that a printing error has left text missing from this document". Then no one could criticize the statement for being less than 100% accurate.
That is how the IBM RedBooks operate. No marketing materials here. This is serious, military grade stuff.
I think the rise of the cloud providers gives IBM Power with Linux a new chance to succeed. The problem for Power Linux was always the ISVs. "Does it support Oracle? No. Does it support MSFT? No.... Thanks for coming in." Google doesn't care, at all, if it supports legacy DB and OS vendors. They going to write their own, next gen versions of all of the above. Google probably also doesn't want the IBM case and would rather just take a license for the IP and build their own servers... but IBM will take that deal.
You'll also see it at times on pages that are after the end of the document, and just included because standard binding is based on sheets that each account for four pages.
Anyone who took school exams in Scotland will be more than familiar with "this page intentionally blank" (or whatever), cos just imagine the consternation if that wasn't explained to you in an exam, and you spend the rest of the summer worried you'd missed a question or hadn't written enough.
This post has been deleted by its author
Essentially relegated to the status of glorified micro-controller that doesn't run as hot as a x86, because exotic things can't match the rhythm of the x86 industry.
Eventually if ARM is not stupid and keeps up they will erode into the PowerPC niche of moderately powerful CPU that doesn't get too hot.
This is an old story.
For at least the past 20 years, every time IBM released a new generation of Power systems I would salivate over their bandwidth, floating-point units, cache sizes, and generally meticulous engineering. Every time, it would also come with the promise of the TCO being lower than a comparable commodity solutions.
A few times, I was sufficiently impressed to get a quote or two - at which point I invariably came to my senses and realized that none of these systems were even remotely in the price range usable for the garden-variety small-scale HPC, and were not intended for the likes of me. Most of the time, my entire acquisition and maintenance budget (which does allow us to operate a quite nice, if not spectacular commodity facility and keep it updated with new hardware) won't even cover an entry-level support contract for one of these beasts.
Until I see the actual upfront acquisition and maintenance contract prices for these systems, I will have to assume that the TCO and TCA claims are simply the marketing speak. A.k.a. a lie.
I know what you mean about their pricing in the past, but they showed some significantly lower pricing in their analyst deck and some pretty good compares to HP/Dell TCA and TCO. I think they're willing to take much lower hardware margins in order to make as big a dent in the market as possible. But the proof is in the pudding...and street pricing.
https://www.ibm.com/marketplace/cloud/big-data-infrastructure/us/en-us
Thank you for the link. This is indeed a very good price for a power-based system.
However, to put things in proper perspective, the price of the "essential" model is not too different from what we pay for a supermicro twin2^2 system, which has *four* dual-Xeon nodes in the same rack space, each with specs not too different from the "essential" power system. Each of the Xeon cores is slower, but there are twice as many; the aggregate memory bandwidth to both sockets is actually slightly higher in the DP Xeon system than in the single-socket power box. Overall, one might expect noticeably better price/performance ratio for the twin2 box.
Of course, as always in HPC YMMV. At least these prices are of the same order of magnitude as commodity boxes - so for some workloads a power-based system may turn out to be a win. That's a nice change.
If this is a member of the Power family, even though it won't (yet?) run AIX or IBM i, it will be LPARable like all the rest (assuming you buy the entitlement).
You've been able to LPAR Power servers, even the Linux only ones, for longer than Unisys have been using Intel processor in Clearpath servers.
IBM pretty much wrote the book on partitioning servers.
It won't run AIX or IBMi as these require the PowerVM hypervisor which is available on other POWER systems from IBM.
This box instead runs OPAL firmware and Linux runs in hypervisor mode, with Linux having complete control of the hardware.
I gave a talk on the firmware stack and how it fits together at linux.conf.au 2016 (link: https://www.youtube.com/watch?v=a4XGvssR-ag ) and you can head over to https://github.com/open-power/op-build/ and compile firmware for this machine yourself (even cross compile from x86)
Does the processor in the machine support Logical Partitioning? Yes.
Is it the same as on POWER7 and earlier and the POWER8 systems that run AIX/IBMi/Linux? No.
It's to do with the firmware stack that's being run. The -L and -LC boxes run a firmware stack called OPAL, the OpenPower Abstraction Layer, where Linux runs in Hypervisor mode and you can use KVM to create virtual machines (using the LPAR functionality of the chip). Paul Mackerras gave a great talk at linux.conf.au 2015 on KVM on POWER that's up on youtube here: https://www.youtube.com/watch?v=GJWe8dUADXg
For non-L non-LC machines, they run PowerVM, the IBM proprietary hypervisor. This enables those machines to run AIX, IBMi and Linux (either one whole machine partition or combinations thereof). In this setup, Linux runs as a guest of the PowerVM hypervisor. PowerVM and Linux on bare metal (running KVM or not) serve different markets.
Now... can you run a guest on the S822L for HPC? Sure, all the bits are there. However, there are limitations (e.g. GPU passthrough) on that and it's not the target market for *this* machine. This machine is designed for HPC workloads that use a lot of GPU.
Hope this helps,
Stewart Smith
OPAL Architect, IBM
(Usual disclaimer: I don't speak for IBM)
"since the Cray I which essentially consisted of 5 off the shelf ECL logic chips"
The Cray 1 wasn't a sea slug brain. It used lots of ICs, just of only a few types. In theory of course you can build any possible computer design with nothing but NOR (or NAND) gates and a storage element; the history of computer design has basically been about putting more and more of them in a single package.
ECL, lad? We used capacitors, diodes, resistors and 2N404 transistors. And lots and lots of interconnect wire, paxolin board and solder.
Sorry, should have said that I meant 5 different kind of chips. I thought it was obvious that, given the low density of ECL you couldn't have things like single chip microcontrollers in ECL.
For those not fluent in IC designs, ECL essentially works by using transistors not as "fully switched" switches, but as amplifiers. So (in a nutshell) a one is one transistor having a higher output current than another, and a zero is the other transistor having a higher output current. Since both transistors will let current through, those chips burn _lots_ of power. However you can get them running at many gigahertz easily.
Burning that much power is what makes ECL rather useless for general purpose computers. It's hard to get that much heat away from those chips if you pack them densely. However you need to pack them densely to not have long transmission lines in between which introduce a delay into the computation. However there are specialist applications which are not general purpose where you can simply have a "pipeline" of stages processing some data. ECL is rather suited for this if you have a layout with controlled impedance and controlled line lengths.
I know what you meant but this is the Internet, give snark the smallest opportunity and it will get in.
There were 8 bit ECL bit slice components, I once researched a possible design for some hand held military equipment which basically powered up the compute unit for a millisecond each time it was needed and would have run off lithium batteries, while a CMOS microcontroller sequenced everything. The bit slice cpu did around 100MIPS, and so was able to do rather a lot of computing in the short time available. Not much use using a low power i2l design if it was still thinking when the bad thing happened that we were trying to prevent.
Owing to a minor cockup in my past I was very aware of the cost of Fluorinert, so when I saw my first Cray in the flesh what really awed me wasn't the sixties-sci-fi look of the hardware, but seeing so much Fluorinert in one place.
Back in days-of-yore when I worked at [Huge Japanese Manufacturer's Name Withheld] IBM OS/MVS shop 'we' were so proud of having almost 1 TERA BYTE (total) of spinning rust; fitted in six (I think) refrigerator-sized cabinets to run the empire on. How things have changed.
IBM is comparing to HP DL360 when Apollo is the big data solution from HP. I'm not in this space but a quick search came up with
"The HPE ProLiant XL270d Gen9 Accelerator Tray provides up to 56 Tflops of single precision performance per server with eight NVIDIA® Tesla M40, and up to 15 Tflops of double precision performance with the NVIDIA® Tesla K80 GPUs and two Intel® Xeon® E5-2600 v4 processors in a 2U server."
https://www.hpe.com/h20195/v2/GetDocument.aspx?docname=c05069270&doctype=quickspecs&doclang=EN_US&searchquery=&cc=us&lc=en
(technically it is a 4U enclosure that looks to house 2 x 2U servers)
I am not sure if they can fit 8 K80s in a 2U package (vs 4 in IBM?) or if it is 8 M40s and a lesser number of K80s. Nvidia says K80 does up to 2.9Tflops of double precision so I would assume they have roughly 8 K80s in a 2U package.
Though HP is using PCIe I think and not NVlink.
Remember that IBM has produced some of the densest servers already with the 9125 F2C Power7 775, aka p7IH (the 'failed' Blue Waters machine, that still got sold to serious HPC shops).
When Power 8 came along, with the drop of the GX++ bus, there was not an p8IH, because of the redesign work necessary for the Torrent hardware (AFAIK), but the last time I spoke with people in the know, they were intending to take a shot at a p9IH server for HPC, but that is no guarantee that a product will be see the light of day.
You've also got to look at the density of the BlueGene/Q, now pretty old, but still scattered through the Top500 list, and peaking at position 4 in the June list.
Mainstream Xeon processors have lower peak bandwidth than the Power8 discussed here, but I routinely sustain >400 GB/s from the 16 GiB MCDRAM memory on my Xeon Phi 7250 systems. The best numbers I have seen are just under 490 GB/s, but that takes a bit of extra tweaking. STREAM Triad gets >470 GB/s with no unusual fiddling required (Flat-Quadrant mode, transparent huge pages enabled, compiled for AVX-512, run with 68 OpenMP threads and launched with "numactl --membind=1").
The Power8 has immensely more memory capacity than the 16 GiB of MCDRAM on the Xeon Phi 7250, but only a subset of jobs need both huge bandwidth and huge capacity. Some of these can use x86 via scalable systems like the SGI^H^H^H HPE UV systems. There are other high-bandwidth, huge-capacity solutions as well -- the Oracle T5-8 from 2013 delivered over 640 GB/s from an 8-socket server with 4TiB capacity.
routinely sustain >400 GB/s from the 16 GiB MCDRAM memory on my Xeon Phi 7250 systems
Don't forget that Knights Landing also has six DDR4 memory channels on-chip, so that with the right memory they can have pretty decent main memory bandwidth. The datasheet gives 115MB/s, but that's the theoretical speed-of-light kind of performance; I would be curious as to what STREAM Triad numbers are for the main memory (my bet is on 90+MB/s).
S812LC red book lists 170MB/s peak bandwidth for an optimal memory configuration (and only 85 MB/s for the small-memory configurations) - so Knights Landing does not look too bad here either, considering that it sells for a small fraction of the price.
Great TCO on a server is one thing. Where's the fully compatible, if a bit slower, $200 impulse buy desktop? Where's the $400 low-end laptop? Where is the $3000 professional workstation version? One of the reasons x86_64 is a server hit is because code for it can be banged together and sanity tested on any number of other, cheaper systems. The final performance tweaks might need access to actual server hardware.
With lots of development in Python, Java, Clojure, Perl, Ruby, et al being a Linux box is nearly sufficient. Even then, though, if there's no C or C++ library to call from those languages then you'll be porting those libs or coding around them, and spending a bunch on programmer salaries in the process. If IBM wants to make IBM great the way IBM previously made IBM great, they need to intentionally do what they did accidentally the first time: align a desktop architecture with what they want to sell in entry-to-mid tier racked servers.
You really can't do that anymore. The hardware may be of the same class, but the similarities end there. Many server innovations in the Intel/AMD architecture have been kept in the servers because they're the only machines that can really make use of them. The article notes various high-speed buses in use that aren't going to be on the desktop anytime soon. Server-class GPUs that are tuned differently from even gamer-class GPUs. Multi-core multi-socket setups. Specialized memory sticks to handle things like buffering or power-failure-tolerance.
It's practically comparing a graphics artist to a construction worker. They may both be human, but their skill sets are entirely different.
The Register 
Biting the hand that feeds IT
Copyright. All rights reserved © 1998–2024
