What's he smoking?
"That's density achieved though clever packaging, not transistor shrinking, and is not comparable to a real TSMC/Intel 1.4nm transistor,"
It was - explicitly - spelt out during the presentation that is wasn't transistor shrinking.
Did he even watch it? Did he read the accompanying paper?
The - whole point - was to get off the transistor shrinking train and onto time scaling. Something they claim everyone will be boarding at some point.
They revealed that hundreds of HiSilicon chips (across multiple fields) have already been produced over the last six years and that the Kirin 2026 will be the first to ship with LogicFolding. That chip is - already - in silicon but unreleased (next year's is currently in pre-silicon) so Huawei already has the production data with regards to metrics. He (I'm referring to her here, lol) also said the hybrid bonding was deliberately modest on the Kirin 2026 so there is known room for improvement there.
Cost was another major reason that transistor shrinking was said to be running out of steam.
Unified Bus was also part of the plan but that isn't new (it's already present on AI cluster systems).
All this without touching on the rumours of Huawei testing an EUV prototype since last year (something they obviously won't be talking about until it's ready - much like with this Tau Scaling Law).
He said that challenges remain but those can be resolved through partnering.