Yes RISC-V is what you get when a bunch of academics who have never done high performance CPU design or cutting edge compiler design create a new ISA.
It was never created to be a general purpose real world ISA, it was created as a THREE MONTH summer project to fill a research need. It was designed to be small and simple and only perform the minimal tasks they needed for that project. It was extremely bare bones but it has had more and more stuff added over the years, without any grand design to lead it all. If they wanted to a create a viable new general purpose high performance ISA they would have created one that had everything it needed from the start, with plans for growth and control over what could be officially added rather than letting anyone implementing one be able to go their own way.
While there is a "standards body" of sorts for it, it has no real power so if some big player like Qualcomm ever was induced to switch from ARM their market power would dictate whatever they did became the defacto standard even if it conflicted with what others are doing in the RISC-V space. So the people who want that sort of thing to happen should be careful what they wish for.
It is hilarious how that POS architecture has got so much love in the tech community just because it is open source, and they see it as a counter to ARM's licensing payments or dragging along x86's 45 years worth of useless legacy. Not that it is perfect, but PowerPC is open and it is far better than RISC-V, though a clean sheet ISA made by people who really know their stuff would beat them all.