India hails 'first' home-grown chip as a milestone despite very modest specs India’s government yesterday celebrated an “important milestone” in the development of its semiconductor industry, and therefore the nation’s ambition to become a global contender, but the celebrations seem premature because the chip that was the star of the show is nothing special. The outpouring of enthusiasm took place at …
The quote below claims that it was specifically designed for radiation resilience in space applications.
Another curious point is it has an Ada based tool chain with C support coming soon. Usually C support (even a subset compiler) is intrinsic to bringing up a new CPU.
The NDTVPROFIT article implied that ISRO used Ada for their development which is rather reassuring as I doubt NASA does to any great extent.
"Unlike commercial off-the-shelf chips, the Vikram 32-bit processor is designed to withstand the extreme conditions of space missions.
"The processor uses a custom Instruction Set Architecture, supports floating-point computation and enables programming in Ada, a high-level language commonly used in aerospace applications.
"All associated software tools, including an Ada compiler, linker, assembler and simulator, have been built entirely in-house by ISRO. Work is also underway to expand its compatibility with a C language compiler, opening the door for broader applications beyond aerospace.
Confirmed also by the 1ˢᵗ sentence of the announcement page linked under "six months ago", viz: "32-bit microprocessors developed for space applications, VIKRAM3201 & KALPANA3201".
This VIKRAM3201 looks to have microcontroller-class grunt with some similarity to the original Raspberry Pi Pico (RP2040). It's 20-bit external address bus limits outside RAM to 4 MB (at 32-bit external data bus, per "spec sheet").
Interesting that the other "six months ago" space chip, KALPANA3201, "is a 32-bit SPARC V8", somewhat reminiscent of LEON (LEON4 is 64-bit though).
"Seems an odd choice to build a new chip on proprietary instruction set when RISC V is starting to take off and they could have build something around that."
Possibly the instruction set was tailored to support their Ada tool chain more efficiently for embedded applications ie an old school CISC architecture.
The ISA isn't easily Googleable - I haven't found it. :)
The chip has two 1553B channels which does indicate that it is aimed as a device for space systems. Any new chip ought to have 64 bits though as the low memory size will be a limitation.
The idea that India can be independent with it's own chip business is undermined by their recent cosying up to China which has lots of chips ready to go without spending money on foundries.
180nm lithography will not bit flip when a cosmic ray particle hits the chip. So very much designed around space exploration outside our protective atmosphere / Van Allen belts.
Compare it with the 200MHz PowerPC CPU (200 MHz 32-bit BAE RAD750) inside one of the NASA Mars explorers.
https://en.wikipedia.org/wiki/Comparison_of_embedded_computer_systems_on_board_the_Mars_rovers
