RISC-V reaches milestone with RVA23 profile ratification

The ratification of the RVA23 profile for RISC-V marks a monumental moment for the architecture, and anyone who's been following RISC-V knows that this isn't just a checkbox. RVA23 is a long-overdue unification of the instruction set architecture (ISA) that effectively gives RISC-V the structure it needs to compete with giants …

[3arn0wl]

I say this as a RISC-V fan...

What RISC-V really needs now, is to be able to boot standard Linux images easily.

[chuckufarley]

Re: I say this as a RISC-V fan...

Amen, Brother!

[Anonymous Coward]

RISC-V is no longer the underdog(?)

RISC-V is like the love handles of CPU archs ... it's great to have it around, but other parts perform better by design -- at least as far as Oops! and dynamic performance are concerned (eg. LISPs and Smalltalks were better served by RISC-III and RISC-IV).

But yes, if your computer is trying to be a large macro-GPU (for matrix-vector "AI") then RISC-V will do just fine ... and in this case, might as well go all the way, hog wild, and weave those cores into a dataflow arch, for near-memory compute, IMHO, and make those cores sweat the good sweat!

[Bartholomew]

Hypervisor as standard is fantastic, now we just need HBI software (Basically similar functionality and more than is currently provided by the OpenSBI, but for a Hypervisor Binary Interface instead of the Supervisor Binary Interface - a standard interface that provides access to machine mode from the supervisor mode across all RISC-V chips).

OpenSBI was initially created by Western Digital Corporation, I wonder who will create OpenHBI.

[Anal Leakage]

It amuses me so…

… to read The Reg’s cybertankie journalists throw shade at Arm, one of Blighty’s great tech successes.