RISC-V? I was pretty sure that was the architecture they are using...
Google says its 'Trillium' TPUs are ready to power the next-generation of AI models
Google blew the lid off its sixth tensor processing unit (TPU) codenamed Trillium, designed to support a new generation of bigger, more capable of large language and recommender models. Initially built to accelerate Google's internal machine learning workloads, like those built into Gmail, Google Maps, and YouTube, the search …
COMMENTS
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Wednesday 15th May 2024 07:24 GMT Anonymous Coward
They're missing a trick.
A lot of recent chip announcements don't tell you the improvement over the previous generation, but the generation before. Much bigger numbers look better at first glance. How they think people spending tens of thousands on accelerators aren't going to look closely is beyond me though.
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Wednesday 15th May 2024 07:54 GMT Yorick Hunt
Re: They're missing a trick.
"How they think people spending tens of thousands on accelerators aren't going to look closely is beyond me though."
The gullible with more dollars than sense will gleefully dive into anything announced as "shiny shiny." They're not, after all, playing with their own money.
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Wednesday 15th May 2024 10:15 GMT HuBo
Re: They're missing a trick.
I hear you! Here though, TPUv5e has an entry in MLPerf 3.1, for offline LLM (gptj-99), with score of 2 sample/s (less than Nvidia's A100 which got 3 samples/s). At 4.7x faster, the TPUv6 should reach past 9 sample/s, which brings it in the ballpark of Intel's Gaudi 2, and Nividia's H100 (10-12 samples/s). Plus, it does it with 67 percent less power than v5e ... so it might be the (almost) best thing since multislice bread, ready for a dollop of SparseCores secret sauce-spread, for some yummy AI treats (or somesuch). A bit like a computational version of Flavor Flav ...
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