Arm targets AI performance with latest Neoverse Compute Subsystems

Chip designer Arm has unveiled two additional Neoverse Compute Subsystem blueprints in its portfolio, and is working with Samsung on its next high-performance Cortex-X core on the Korean chipmaker's 2nm production process. Arm introduced its Neoverse Compute Subsystems (CSS) last year, pitching it as a speedier way for …

[HuBo]

The wholesome goodness of home cooked chips

Wow! This just answered my ARM HPC prayers and makes my day! Get 'em brewskis ready for some easy-oven CSS V3-integration bake-off of extra yummy performance goodness (healthily baked with a side of HBM, not fried)! Party time!

[Bebu]

Can't the Vulture do Å ? :)

"Intel Foundry's 18A process node"

I am assuming 18A is 1.8nm aka 18Å.

I don't think there is an el Rego unit for IC fabrication process sizes - I imagine something like what you get when subdividing 1 imperial foot into (12)^6 parts so it would be an embuggerment to go down to next scale viz 1ft/(12)^7 :)

(Troy weight is still around and we could have easily kept 12d/1s if we had moved to the duodecimal number system [and sprouted extra fingers] - 10d/1s, 6d = .6s, 18s/£ 19s/gn but probably replace the £ with a twelve shilling $ :)