I want one!
Quite cool, for reconfigurable computing, to have the x86 and FPGA in the same SOC (rather than PCIe, USB tether, ...), as seen in this AMD design. One might have hoped though that FPGA setup software, for synthesis and place/route (eg. Vivado, Yosys, ...), could run efficiently on the Versal's Cortex-A72 cores (or even some other ARM chips, eg. Neoverse, Apple M3, ...) but this may (unfortunately) not yet be the case, except under some form of x86 emulation. Reconfigurable computing being the future, this does look like a great platform to experiment with that ...
Also quite nice (IMHO) is the Cologne Chip GateMate FPGA, presented (with slides) at FOSDEM (Feb 3-4, 2024, Brussels) whose architecture enables partial self-reconfiguration (updating chip configuration from the inside, while running in unaffected sectors). This could open the door to designing oneself a reconfigurable RISC-V, for example (without x86 or ARM host) ...
From there, it should be a cinch (if desired) to realize a 3 million toothbrush botnet apocalypse, as masterfully foretold 2 decades ago (eh-eh-eh!)!