To come out later do not equal to higher density.
Intel 20A/18A does have backside power delivery, according to earilier Intel slides, PowerVIA will bring 10% reduction in size in Intel 4, so we can safely assume the same in Intel 20A/18A. I had reasons to believe that Intel 20A will be 5% density with 10% performance over TSMC N2, if what is currently published is the truth, intel 20A/18A will still bring around 2% in density and 7% in performance (educated guess only) over TSMC N2P which is their first generation backside power delivery, Intel's PowerVIA is a nTSV design i.e., the 2nd generation of backside power delivery from TSMC which is not on their roadmap (there will still be power line in M0 then run the copper to the other side so it did not route through M1, but intel is directly powering the M0 from the back, i.e. there is still area that Intel will saved over TSMC backside power delivery and the power is more direct by the Intel approach.
Do you see the overheat, if you said this is purely Apple design flaw, that is just too navie, TSMC N3B is part of the problem, as I posted in another forum, TSMC N3B is a failure, no one will use it even iPhone 16 will drop it. Then you needed to talk about Intel Meteor Lake on Intel 4 / sierra forest Intel 3 vs iPhone 16 pro max, because if you look at this why no one except apple will use TSMC N3B, Amazon/bitcoin mining/specialised AI is a very good candidate for such a node, no, only Apple. In engineering point of view you can compare to Airbus A380, yes you build the largest airplane, but you use 4 engines and orders are going to 777 not to A380, same yes might be (just might be) TSMC N3B is going to be smaller than Intel 4 but at what cost (performance and density), it will only goes 1 node and the momentum is lost as anyway future N2 node will be on ASML High NA, the lesson learned in double patterning EUV is totally gone, the future required double patterning but on EUV High NA.
Intel is already ahead of TSMC sorry but this is the truth, you needed to compare Intel 4 to TSMC N3E (which bring close to 0 scaling (in SRAM) to TSMC N5). Because Intel is now saying meteor lake will bring the 10%-20% power saving on the same performance over raptor lake, taking into account chiplet / tiles penalty, sorry to dash the fanboy of TSMC, this is the truth TSMC is no longer producing the highest performance transistor in the world is mass volume, Intel is now the king of transistor again in 2023.