Intel spices up its FPGA game with open source and RISC-V freebies

Intel has expanded its FPGA line-up with cost-optimized offerings, open sourced the official release of its software stack, and added a free RISC-V processor design, among other updates. The Santa Clara chipmaker said it is broadening the Agilex FPGA portfolio to meet an increased demand for customized workloads – including, …

[bazza]

Giving Away Free Stuff?

Hmmm, are they having trouble selling these devices?

I know that both Intel and AMD have both bundled into the FPGA business buying Xilinx and Altera, but for the life of me I can't think why. There's just not that many good applications for them. The current tech hotness - AI - is clearly best served either by GPUs, or bespoke silicon doing all the adding up in analogue. FPGAs are just far too slowly clocked to be competitive, and aren't as parallel as some of the monster GPUs that NVIDIA is churning out these days.

FPGAs are an expensive way of doing things at scale; they're only "cheap" for specific niche applications, none of which appears to have ever been of interest to Intel or AMD before. Such applications tend to be ones where, ideally, one would be building bespoke silicon but can't afford to do so. However, such niche applications are evaporating; modern CPUs have such enormous grunt, and are available in all sorts of sizes, that there's increasingly little point suffering the complexity and inflexibility of an FPGA.

[MJB7]

Re: Giving Away Free Stuff?

My employer has recently moved from separate crypto accelerator to FPGA - and expect to go further.

[bazza]

Re: Giving Away Free Stuff?

Why did they do that? To slow it down? I jest.

But, it's worth pondering how many FPGAs your employer's application needs, and then compare that to the volumes of CPUs / GPUs sold every year. This has always been the problem with FPGAs. They don't get the sales volumes. They therefore tend not to be at the cutting edge in terms of cost per performance, and even if they are faster for an application they won't stay that way for long. Plus, the dev time is painful. By the time the firmware for an FPGA is finished, a few lines of, for example, CUDA on NVIDIA's latest GPU blows it out of the water. Or to put it another way, I can compile and start a program running on a CPU long, long before the FPGA build tools have completed place-and-route. No point being the hare, if the tortoise can get a day's head start.

At various points in my career, making choices between FPGAs and CPUs for processing, not once has an FPGA actually come out as "faster", or "cheaper". It's just too, too easy to pile up CPUs until you have enough of them, and software is a whole lot easier to write (plus, doing other stuff too is easy). FPGAs suite only niche applications, and the problem then is that there's not a very large market for them.

I've also seen numerous projects stung by FPGA snake oil. Xilinx used to be particularly bad. There was one mess which was the result of a die shrink done by Xilinx; for some reason, one single transistor wasn't shrunk, and this oversized transistor got lithographed over the top of dozens of others. Needless to say, that part of the chip didn't work. Trouble was, Xilinx kept stum. When customers eventually concluded that they weren't going mad and that there had to be a problem with the chip and not their code, Xilinx simply said "sorry" and handed out a late, lamented errata sheet. There's also been problems with cross talk between different I/O subsystems on some FPGAs. They may have got better at avoiding such mistakes, but they lost my trust decades ago.

[twellys]

Re: Giving Away Free Stuff?

No, Intel (Atera) were bundling their own Nios2 32-bit CPU for ages before. With Risc-5 advertising that 32 or 64-bit, free, and a potential of customers for Risc-5, then it's a no-brainer for Intel.

As FPGAs are an expensive way of doing things at scale, I agree. However, FPGAs have their place:

* Cheaper than ASICs for small/medium runs: Medical/Industrial/Aerospace/Test

* Re-configurable: Any prototypes

* Massively parallel: Crypto farms

As for Intel & AMD buying the FPGA companies, both Intel & AMD have incorporated their FPGAs as part of their CPUs - c'mon they don't want to re-spin their CPUs for every exploit they find?!

[bazza]

Re: Giving Away Free Stuff?

And I have no doubt that Risc-V in a soft core incarnation will be just as slow as NiosII was.

I'm not sure that you'll find that many FPGAs in those market sectors, especially these days. They're the kind of market sector the sales literature likes to quote, but there's not really a need for a big chunky FPGA in any medical or industrial application. You'd be amazed at how many aerospace applications are actually done in software.

Also, FPGAs are not "massively parallel", they're "fairly parallel", and they eventually run out of on-chip memory. As soon as the dataset becomes too big for their on-chip RAM, they need to rely on DDR RAM of one sort or other. The problem there is that FPGAs tend not to have many DDR interfaces, and quite often they're slow. This ends up being the bottleneck,

[Justthefacts]

Re: Giving Away Free Stuff?

Chicken and egg. If you want to develop a new CPU, you need to prototype it on an FPGA. Otherwise you will be lucky to simulate it at more than a few cycles per second. So if you are Intel or AMD, best not to rely on your competitor for the one development tool you can’t do without. It may well be that *selling* them is not the strategic purpose here. As long as the FPGA business wipes it’s face, it’s fine.

Option 2, is that it might not be user-facing functionality. Eg. If there are some bits of their CPU that are critical to overall performance, but not actually high gate-count, why not pull in some FPGA IP from Xilinx and soft-code those functional blocks. For example, dynamic algorithms for branch predictors or cache preloaders. I’m not convinced there is good mileage there, but if there’s secret sauce they could already be doing it and we would never know.

Option 3. if they believed they had found a way of dynamically optimising critical code, reconfiguring the FPGA on the fly. Then it could be used as “a coprocessor for all seasons”, slotting in perfectly on every tight loop. The problem with this is that nobody ever got auto-generation to work. Maybe they just wanted to get the hardware IP in-house, for future-proofing against disruption. Remember, there’s only two viable FPGA manufacturers to buy, and maybe 5/6 “CPU” (sort of) manufacturers - Intel, AMD, NVidia, ARM, Qualcomm, Apple. If this became a thing, the last 4 out of those 6 become instantly non-runners, and there’s nothing they could do about it. No FPGA, no play. Seems worth a punt, strategically, to protect an angle.