back to article Micron joins the CXL 2.0 party with a 256GB memory expander

Micron has become the latest chipmaker to announce a compute express link (CXL) 2.0-compliant memory expansion module capable of strapping up to 256GB of DRAM to a spare PCIe x8 interface. While development on the CXL standard began in earnest in early 2019, it wasn't until recently that compatible CPUs from AMD and Intel were …

  1. ChoHag Silver badge

    Do you think I could swap out my hard drive for this?

    1. doublelayer Silver badge

      Of course, but I recommend you buy a really good UPS. It could provide some extra vigilance points as well. I had a device from the early 2000s which stored all its data in RAM and, if you ran the battery down, would delete all your files and reset to factory settings. Oddly enough, I was a lot more careful about keeping that one charged, even after I invested in a compact flash card to keep my files.

  2. Dom 3

    Reach out

    https://www.thepoke.co.uk/2015/07/24/acceptable-say-reach-work/

  3. Steve Davies 3 Silver badge
    Boffin

    How many mortages would I need to take out for one of these?

    Asking for a friend naturally.

  4. Bebu Silver badge
    Windows

    Compression? ;)

    "...capable of delivering 36GB/s of bandwidth.

    It's not exactly clear how Micron has managed to do this as a PCIe 5.0 x8 interface is only good for around 32GB/s."

    I imagine a bit of light compression (RLE?) at each end of the PCI bottleneck could add the extra 4GB/s.

    I could see this being useful for zram/zswap style swap (or any type of caching I suppose.) Although the multiple mortgages would be another consideration. ;)

    Ths 32/36 GB/s could be Micron marketing droids playing the usual storage vendor GB v GiB games and getting it arse about.

    1. Kobblestown

      Re: Compression? ;)

      Maybe they talk about the bandwidth of the memory chip array behind the controller. Unlike DRAM, PCIe is full duplex, so the aggregate BW of said link is 32GB/s write + 32GB/s minus the protocol overhead. I assume you wouldn't really have read-only or write-only use case, so you can benefit from the full duplex nature of the link for mixed workloads.

  5. Mark Hahn

    latency, latency, latency

    Yet another article about CXL that doesn't mention latency.

    You know, the reason you have RAM in the first place. To quote some random yoohoo, bandwidth is easy but latency is hard.

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