China
And with China investing in RISC-V tech, does this cause any form of potential conflict?
Intel is establishing a $1bn fund to support early-stage and established chip companies to develop innovative chip and packaging technologies. The semiconductor giant is also opening its doors to companies who also need help with design and validation of advanced chips on all major architectures, including x86, Arm, and RISC-V …
Although no doubt RISC-V is superior to the mess that is x86, it is generally regarded as less efficient than typical RISC architectures such as ARM, MIPS, PowerPC, SPARC, and so on and so forth.
Of course, the last time Intel tried to design an architecture of its own that was comparable to typical RISC architectures, we got the Itanium.
AMD was working on a line of ARM server chips - with tech that ended up in Ryzen, on which AMD wisely focused its limited resources. No doubt Intel has strategic reasons for not wanting to compete in that space, but surely they could if any other company brought that space into existence.
Also, given how well just-in-time compiling works these days, it's possible that AMD could bring out, in future, a line of x86 server chips that suffer almost no loss of efficiency from being x86 instead of RISC, through using a different x86 implementation technology - like the Transmeta Crusoe.
I could be completely mistaken, but maybe it might be possible to make some powerful and energy-efficient chips with that kind of technology, even if they would not be able to offer the kind of single-core performance needed for gaming. If so, the need to abandon x86 would be reduced still further.
x86 ISA breaks almost every rule of good ISA (Instruction Set Architecture) design. There is nothing “regular” or predictable about its syntax.
Size and Complexity - The x86-64 ISA has a large number of instructions, partly because of a large number of complex instructions and partly because it keeps most of the legacy and deprecated instructions (∼ 336+) for the sake of backwards compatibility, which is btw one of its success factors.
Inconsistent Instruction - Variants Some variants have divergent behaviors more than the difference of their type and size.
Undefined Behaviors - The x86-64 standard also admits undefined behaviors that are implementation-dependent. (322 out of 996 mnemonics) have undefined behaviors: their output values of the destination register or the flags register are undefined in certain cases.
... and more to add.
And all of these despite the brilliant engineering of Intel/AMD to keep the x86 ISA competitive and keep the power envelope under control.
Combining x86 with ARM or RISC-V may solve some particular cases, but...x86 will eat 80-90% of the power.
PS I started back in the late 70's with Intel 8008, 8080 and 8086 and I am a little bit nostalgic about x86...however x86 seems to be a lost cause.