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RISC-V International emits more open CPU specs

First edicts of 2022 include firmware, hypervisor-level specifications

Liam Proven in Prague Wed 22 Jun 2022 // 19:00 UTC

Embedded World RISC-V International has grown its pile of royalty-free, open specifications, with additional documents covering firmware, hypervisors, and more.
RISC-V – pronounced "risk five", and not to be confused with the other architecture of that name, RISC-5 – essentially sets out how a CPU core should work from a software point of view. Chip designers can implement these instruction set specifications in silicon, and there are a good number of big industry players backing it.
The latest specs lay out four features that compatible processors should adhere to. Two of them, E-Trace and Zmmul, will be useful for organizations building RISC-V hardware and software, and the other two could prove important in future, aiding the development of OSes to run on RISC-V computers.

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The ‘substantial contributions’ Intel has promised to boost RISC-V adoption

With the benefit of maybe revitalizing the x86 giant’s foundry business

Dylan Martin Tue 17 May 2022 // 23:49 UTC

Analysis Here's something that would have seemed outlandish only a few years ago: to help fuel Intel's future growth, the x86 giant has vowed to do what it can to make the open-source RISC-V ISA worthy of widespread adoption.
In a presentation, an Intel representative shared some details of how the chipmaker plans to contribute to RISC-V as part of its bet that the instruction set architecture will fuel growth for its revitalized contract chip manufacturing business.
While Intel invested in RISC-V chip designer SiFive in 2018, the semiconductor titan's intentions with RISC-V evolved last year when it revealed that the contract manufacturing business key to its comeback, Intel Foundry Services, would be willing to make chips compatible with x86, Arm, and RISC-V ISAs. The chipmaker then announced in February it joined RISC-V International, the ISA's governing body, and launched a $1 billion innovation fund that will support chip designers, including those making RISC-V components.

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Will this be one of the world's first RISC-V laptops?

A sneak peek at a notebook that could be revealed this year

Dylan Martin Wed 18 May 2022 // 23:17 UTC

Pic As Apple and Qualcomm push for more Arm adoption in the notebook space, we have come across a photo of what could become one of the world's first laptops to use the open-source RISC-V instruction set architecture.
In an interview with The Register, Calista Redmond, CEO of RISC-V International, signaled we will see a RISC-V laptop revealed sometime this year as the ISA's governing body works to garner more financial and development support from large companies.
It turns out Philipp Tomsich, chair of RISC-V International's software committee, dangled a photo of what could likely be the laptop in question earlier this month in front of RISC-V Week attendees in Paris.

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RISC-V needs more than an open architecture to compete

Arm shows us that even total domination doesn't always make stupid levels of money

Rupert Goodwins Mon 16 May 2022 // 13:00 UTC

Opinion Interviews with chip company CEOs are invariably enlightening. On top of the usual market-related subjects of success and failure, revenues and competition, plans and pitfalls, the highly paid victim knows that there's a large audience of unusually competent critics eager for technical details. That's you.
Take The Register's latest interview with RISC-V International CEO Calista Redmond. It moved smartly through the gears on Intel's recent Platinum Membership of the open ISA consortium ("they're not too worried about their x86 business"), the interest from autocratic regimes (roughly "there are no rules, if some come up we'll stick by them"), and what RISC-V's 2022 will look like. Laptops. Thousand-core AI chips. Google hyperscalers. Edge. The plan seems to be to do in five years what took Arm 20.
RISC-V may not be an existential risk to Intel, but Arm had better watch it.

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RISC-V CEO seeks 'world domination' by winning over the likes of Intel

We speak to the head of ISA's governing body on industry adoption, timelines, and more

Dylan Martin Sat 7 May 2022 // 13:22 UTC

Interview The CEO of RISC-V's governing body says she wants to nothing less than "world domination" for the rising open-source processor technology, but to do that, the nonprofit needs buy-in from a variety of organizations, even those steeped in dominant, proprietary architectures, such as x86 giant Intel.
In an interview this week with The Register, RISC-V International CEO Calista Redmond reckons the buy-in, which comes in the form of paid memberships, is needed to support ongoing development of the royalty-free CPU instruction set architecture to better compete with x86 and Arm ISAs.
"We have to have a level of funding in order to operate and manage this special rodeo of ours," she says.

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GNU Compiler Collection adds support for China's LoongArch CPU family

MIPS...ish is on the march in the Middle Kingdom

Liam Proven in Prague Wed 18 May 2022 // 04:26 UTC

Version 12.1 of the GNU Compiler Collection (GCC) was released this month, and among its many changes is support for China's LoongArch processor architecture.
The announcement of the release is here; the LoongArch port was accepted as recently as March.
China's Academy of Sciences developed a family of MIPS-compatible microprocessors in the early 2000s. In 2010 the tech was spun out into a company called Loongson Technology which today markets silicon under the brand "Godson". The company bills itself as working to develop technology that secures China and underpins its ability to innovate, a reflection of Beijing's belief that home-grown CPU architectures are critical to the nation's future.

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China's Kylin Linux targets second RISC-V platform

Is state-approved Ubuntu distro how the Middle Kingdom will replace PCs with home-grown kit?

Simon Sharwood, APAC Editor Mon 16 May 2022 // 04:58 UTC

China's military-derived and government-approved Linux distribution, Ubuntu Kylin, has revealed plans to target a second RISC-V platform.
Ubuntu Kylin is Ubuntu’s official version for China and was developed in partnership with Chinese authorities, including the military.
In March 2022, a version of the OS was released for the HiFive Unmatched board – a SiFive product in the Mini-ITX form factor and packing a five-core Freedom U740 SoC.

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MIPS discloses first RISC-V chips coming in Q4 2022

eVocore processor line aimed at high-performance, real-time compute applications

Dan Robinson Wed 11 May 2022 // 13:30 UTC

MIPS is back, but this time the company is bringing processors to market based on the RISC-V open instruction set architecture, rather than the MIPS architecture the chip designer is synonymous with.
The current incarnation* of MIPS proclaimed its entry to the RISC-V market with a preview of the first products in its new eVocore processor line, which initially comprises two multiprocessor IP cores, the eVocore P8700 and I8500.
MIPS said that the new processors are designed for high-performance, real-time compute applications such as networking, datacenter, and the automotive industry.

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Alibaba Cloud gets more of Android working on RISC-V silicon

Cameras, Wi-Fi, and Bluetooth are operational – maybe China’s wider tech independence plan is, too

Simon Sharwood, APAC Editor Wed 27 Apr 2022 // 05:47 UTC

Alibaba Cloud has advanced its work to port Android to the RISC-V architecture.
The Chinese cloud giant has spent more than a year working on a port of the Google-spawned OS and in January 2021 showed off a GUI powered by Android 10 running on silicon designed by T-Head Semiconductor – an Alibaba subsidiary that designs its own RISC-V chip.
Alibaba Cloud has now revealed it's working on Android 12, and has integrated third-party vendor modules. The result is Android on RISC-V that's capable of playing audio and video, running Wi-Fi and Bluetooth radios, and driving cameras.

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India reveals plan to become major RISC-V design and production player by 2023

Joins open chip standard's international board to show it's really serious this time

Simon Sharwood, APAC Editor Fri 29 Apr 2022 // 04:45 UTC

India's government has announced a plan and roadmap for local semiconductor design and production, based on the open source RISC-V architecture, and set a goal of delivering world-class silicon by the end of next year.
The Digital India RISC-V Microprocessor Program (DIR-V) will see Indian industry and academia team to develop Systems on Chips (SoC) for servers, mobile devices, automotive applications, IoT devices, and microcontrollers.
Rajeev Chandrasekhar, a former Intel chip designer who now serves as India’s minister of state for entrepreneurship, skill development, electronics & technology, said DIR-V aims to "achieve industry-grade silicon and design wins by December 2023."

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