back to article DARPA picks Intel to automate conversion of FPGAs into ASICs for military applications

The United States’ Defense Advanced Research Projects Agency (DARPA) has announced an effort to “expand access to domestic manufacturing capabilities to tackle challenges hampering the secure development of custom chips for defense systems.” Intel was named as the only commercial partner of the effort, named Structured Array …

  1. Doctor Syntax Silver badge

    What's in a name?

    "Structured Array Hardware for Automatically Realized Applications program – aka project SAHARA"

    That's the tricky bit done. Getting a cool project name is essential for the CV.

  2. druck Silver badge

    Buying spree

    Isn't this because Intel bought up a lot of the PGA and ASIC specialists such as Altera, Omnitek and eASIC?

  3. Mike_in_the_house

    Can someone fix the “sate desire” headline... reminds of Johnny Blue Eyes movie, “The La Trattoria” sketch! :)

  4. Pascal Monett Silver badge

    “security countermeasures capable of thwarting reverse engineering"

    Well, the guy who manages to actually prevent reverse engineering is going to be one special mind for sure.

    I'm not a specialist on the subject in any way, but I fairly sure that there is not much you can do to prevent an X-ray scan of your chip.

    And I'm convinced that, as far as hardware is concerned, reverse engineering starts with an X-ray scan.

  5. Mike 137 Silver badge

    Higher resilience as well?

    "he research house also noted that “Structured application-specific integrated circuits (ASICs) deliver significantly higher performance and lower power consumption.”"

    And greater long term reliability in service. Any device the configuration of which depends on inevitably tiny stored charges is vastly more susceptible to failure than a device with configuration based on etched silicon. The former can be disrupted by radiation, temperature, age at least, but the latter is essentially immune. For defence (indeed any ultimately critical) devices the choice is a no-brainer.

    1. Anonymous Coward
      Anonymous Coward

      Re: "choice is a no-brainer" - citations welcome

      Once upon a time there used to be one-time-programmable FPGAs based on fusible links or on "anti-fuse" technology to store the equivalent of the downloaded device configuration bitstream. Readers might want to look it up. Well-informed readers might want to comment on where it fits in the modern hierarchy of FPGA->ASIC.

      To build an FPGA-centric system of any significance you start from an application written in some kind of HDL. To generate a corresponding ASIC you also start from (much the same?) HDL.

      With modern mass market FPGAs and the associated performance and volume-based pricing there is little room for low volume ASICs, unless things have changed in the last few years.

      It's almost as if spending decisions for military projects were being made by clueless people.

      1. Anonymous Coward
        Anonymous Coward

        Re: "choice is a no-brainer" - citations welcome

        FPGA HDL often cannot be ported directly to ASICs, because the hardware building blocks are different FPGA HDL will be written around the LUTs, block RAMs, and DSP blocks of the FPGA and also its lower clock speed compared to ASICs.

        I believe this is the appeal of structured ASICs - they are intermediate between FPGAs and conventional ASICs in that the HDL is written around the building blocks of the device. So there is a natural progression of a design from FPGA to structured ASIC. And I guess Intel have tried to make this even easier since their purchase of eASIC.

        I don't know of any biggish FPGA products that can be literally hard-programmed - they all seem to be SRAM devices, probably because fusible links don't scale to the millions of LEs we have nowadays.

  6. Anonymous Coward
    Anonymous Coward

    Intel? Seriously?!?

    Excellent choice. Intel are well known for nimble. low-power engineering...

    I can only imagine a large part of it is wanting to keep production in the USA for security purposes.

    1. Gene Cash Silver badge

      Re: Intel? Seriously?!?

      Eh, not all the engineers at Intel are saddled with an ancient ad-hoc architecture that's unfortunately become a world standard.

      They do still have a ton of smart blokes, and there's not much they can do to improve x86, so it's good to give them other work.

    2. martinusher Silver badge

      Re: Intel? Seriously?!?

      There are two major suppliers of large FPGAs, Xilinx and Altera. Intel aquired Altera (and I've just noticed someone remarking on AMD buying Xilinx) so this is a logical next step in the evolution of programmable logic.

      The danger to Intel comes from the defense oriented nature of the work. Most people don't think of Ferranti in the UK as a major supplier of semiconductors (and they even had one of the earliest 16 bit microprocessors). For all I know they or their successor companies are still making them but they're not a significant force in the industry because military contracts tend to be lucrative backwaters -- well paid but a dead-end for competitive product designs. The temptation is to shed -- hive off or outsource -- all those annoying low margin commercial ventures and just focus on the high margin product. After all, what's the point of breaking your neck trying to wring profit out of a $5 commerical part when there's a ready market for parts at $2K or more a pop?

      (FWIW -- Xilinx used to be a staple at where I worked. It decided it wasn't interested in commercial work, suport withered, tools became expensive and so on. Customers had to put up with it, I suppose. Except that the last project I did in this area was conversion of existing product to Lattice. The parts were cheap, plentiful and Lattice was hungry for the business.)

  7. teknopaul Silver badge
    Coat

    It's a close run race, Intel are just 5 nanometers behind.

    I'll get my coat

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