RISC-V business: SiFive and CEVA join forces to enable the development AI-amenable, edge-oriented processors

On Tuesday, RISC-V CPU fixer SiFive announced it's working with CEVA, which licenses technology for deep learning, audio, and computer vision, to simplify the creation of processors capable of handling machine learning code without demanding too much power. RISC-V is an open, royalty-free instruction set architecture, unlike …

[Korev]

There's a RISC of some bad puns here; hopefully no one will chip in...

[Citizen of Nowhere]

You're so right. Best put a SoC in it.

[Korev]

That's a bit sillycon

[BillG]

Apples & Oranges

RISC-V is an open, royalty-free instruction set architecture, unlike Intel's x86 the ARM chip architecture which requires a license to implement recent processor designs.

FIFY

RISC-V and x86 are completely different markets, the first is for embedded and the second is definitely not. RISC-V is punching it out with ARM, period.

[karlkarl]

Re: Apples & Oranges

Agreed

POWER 9 with Raptor Computing's open ISA is the replacement Intel x86

Out of interest, does anyone have one of these? Unlike most RISC-V vaporware, I can actually go out and buy hardware from Raptor Computing.

[joeldillon]

Surely ARM would be a better example of 'you need a licence to implement their ISA'? Other than AMD, who's making x86-compatible chips?

[Ian Joyner]

Processor security

Processor instruction sets won't be interesting until they have security built in. The main support must be support for structured memory with bounds checking. Building such facilities into hardware is the fastest way to do it. Without this, personal devices can never be secure.

The claim here is that RISC-V will support AI. But AI is being used more and more against the individual. Security protects the individual.

Computing is moving in the wrong direction – support for anti-individual AI while ignoring and denying individual security.