back to article Not to over-hype this storage chip tech, but if I could get away with calling my first-born '3D NAND', I totally would

Anyone who’s ever watched the original Star Trek series will probably remember Spock and Kirk playing three-dimensional chess – a great chance for the Enterprise’s science officer to show off his prowess with logic as he contemplated a range of complex moves. It’s that same complexity that underlines one of the hottest …

COMMENTS

This topic is closed for new posts.
  1. IGotOut Silver badge

    Why do I feel I've sat through...

    Yet another buzzword bingo sales meeting.

    All we needed was a power point presentation to top it off.

    1. Thoguht Silver badge

      Re: Why do I feel I've sat through...

      Maybe, but 3D NAND really is a major breakthrough. It's a win-win, because not only does it increase chip memory capacity, it allows the NAND cell size to be much larger, which increases reliability and endurance (strange this wasn't mentioned in the article).

      1. Martin Gregorie Silver badge

        Re: Why do I feel I've sat through...

        Maybe, but 3D NAND really is a major breakthrough.

        Really? Given that we already have multi-layer flash, this article makes it sound just like more of the same. Think Manhattan and the Empire State as compared to the Woolworth building: similar technology but more tiers.

  2. Anonymous Custard Silver badge
    Headmaster

    Hot in here?

    The other problem that's going to get worse is heat removal. I'm a little surprised the article didn't put that on the table too.

    It's bad enough in 2D as devices shrink and more and more are crammed into a given physical area, but when they are stacked there's even less path for heat to be lost. And if things get too warm, over time stuff starts migrating and generally the functionality of the parts of the die (the transistors and capacitors mainly, but not exclusively) degrade or even fail.

    As capacity (and so density) increases, that's only going to get worse until some more active solution to remove the heat is required. Or another change of materials to make the switching more efficient and so not generate as much heat in the first place...

    1. diodesign (Written by Reg staff) Silver badge

      "the article didn't put that on the table too."

      Well, that's what the article comments are for. We can't cover every angle and get stuff out on time in a regularish pattern - journalism is the first draft of history, and all that.

      Feel free to pitch in extra thoughts on these forums - ta!

      C

    2. short

      Re: Hot in here?

      The unused layers are just going to sit there, like NAND does, taking (next to) no power. I don't think anyone's (yet) pitching running all the layers simultaneously - there's not a controller per layer.

  3. ChrisElvidge

    Low Fluorine Tungsten?

    "There are a couple of options here: one is to use a particular kind of tungsten, a low-fluorine version"

    WTF is Low Fluorine Tungsten? (Asking for a friend).

    1. diodesign (Written by Reg staff) Silver badge

      Re: Low Fluorine Tungsten?

      You're in luck - it's patented! And on Wikipdia

      Using fluorine with metals is not new at all. Uranium hexafluoride is used to separate U235 and U238 isotopes in centrifuges for nuclear fuel and weapons, for example.

      C.

      1. Ian Michael Gumby
        Alert

        Re: Low Fluorine Tungsten?

        Ok, and I have to ask... just how toxic are the byproducts from manufacturing these chips?

        (Granted we're not talking about Uranium Hexaflouride...)

        I mean should these companies worry about having to notify customers of the potential toxic nature of these materials? (Under California law, everything is toxic these days)

        1. Anonymous Coward
          Anonymous Coward

          Re: Low Fluorine Tungsten?

          >just how toxic are the byproducts from manufacturing these chips

          ****ing toxic. And dangerous.

          Google arsine.

          1. Anonymous Coward
            Anonymous Coward

            Re: Low Fluorine Tungsten?

            Wow, Google gets called all sorts of things!

  4. Justthefacts

    Difference between 3D NAND and TSV chiplets?

    Whats the cost benefit between 3D NAND and TSV chiplets?

    Obviously, there’s a huge win from 2D NAND up to say 128 layer. But there must come a point where the cost of putting down each layer contributes most of the total cost, and then the price of the chip just scales linearly with number of layers. At that point, why not just make say 128-layer chiplets and stack them on top of each other using TSV or interposer technology, as high as you want, like Hybrid Memory Cube?

    Anybody know where the limit of this might be?

    1. Anonymous Coward
      Anonymous Coward

      Re: Difference between 3D NAND and TSV chiplets?

      If you use TSV, you sacrifice overall Silicon capacity to make way for all those bulky vias ? Point taken though - when to go to multiple die over multiple layers ....

  5. egreen99

    The future is finally arriving, I guess

    Many people roundly mocked the late Jerry Pournelle when, in the late 1980's, he proclaimed that in the future semiconductor storage would supplant rotating rust. Seems though that he may have been right. 3D NAND looks like it'll meet or beat spinning rust on capacity, and if the price goes down, spinning rust is likely dust.

This topic is closed for new posts.

Biting the hand that feeds IT © 1998–2020