TSMC 7FF/7FF+ and Intel EUV
Saying that TSMC 7FF is "low-power" and 7FF+ is "high-speed" isn't correct. 7FF has both compact low-power libraries (and metal options) for mobile (which Apple/HiSilicon use) and bigger faster higher-power libraries (and metal options) for CPU/HPC (which AMD use) -- actually, they can be mixed on the same chip. 7FF+ uses 5 EUV layers and new libraries to get 15%~20% area shrink, a small power reduction, and an even smaller (a few percent) speed increase -- and it also has low-power and high-speed libraries, just like 7FF. The main reason for 7FF+ is to pipeclean EUV before TSMC use it in anger for 5nm (due next year), and to get some reduction in die size/cost/TAT.
Intel's 10nm problems are not due to EUV because they don't use it -- they used quad patterned metal instead to push the metal pitch down (problem#1), cobalt interconnect instead of copper for the same reason (problem#2), contact over active gate to save more area (problem#3). All these together screwed the yield, and some or all are being removed from their "new 10nm" process due out next year.
More to the point, they're now more than a year behind TSMC 7FF with a similar process instead of the 3 years ahead that they originally promised...