back to article Linux lobby org joins with RISC-V bods to promote open chip spec

The Linux Foundation, the non-profit funded by for-profit tech firms to promote the open source operating system, has begun working with the RISC-V Foundation, another non-profit backed by well-heeled companies, to encourage adoption of the open source RISC-V instruction set architecture (ISA). The two organizations on Tuesday …

  1. bazza Silver badge

    There is Another Open Source CPU...

    AFAIK IBM make their POWER CPUs open source in some way or other. Which is a pretty big piece of very complete chip design available to all and sundry. There's the OpenPower foundation, and Raptor are doing a server that's completely open source, from the chips / firmware upwards. Very commendable!

    So wouldn't it be superfluous to add too much to RISC V, to end up with two competing open source server chip designs running Linux? After all, it's not like POWER 9 is lacking much.

    1. Long John Brass Silver badge

      Re: There is Another Open Source CPU...

      MIPS too; Or is MIPS part of the Power family. Also SPARC is open hardware these days too no?

      1. eldakka Silver badge

        Re: There is Another Open Source CPU...

        > MIPS too; Or is MIPS part of the Power family. Also SPARC is open hardware these days too no?

        SPARC has been open since the early 90's.

        I am curious as to what particularly makes RISC-V more attractive to other open, royalty-free architectures such as SPARC and OpenPOWER.

        1. Bruce Hoult

          Re: There is Another Open Source CPU...

          That would be an FAQ;


          OpenPOWER is not so open. I believe you have to pay substantial license fees to build a processor? Also, like MIPS and SPARC (and OpenRISC) the opcode encoding space is pretty much full, with little room for future standard or experimental extensions.

          In RISC-V you can build a very simple CPU with fixed-length 32 bit opcodes and fewer than 50 instructions, taking very little space on an SoC or in an FPGA, and gcc and llvm will happily target that.

          But at the same time, RISC-V supports instructions of any length from 16 bits to (at the moment) 176 bits (22 bytes) in multiples of 16 bits, with a standardised encoding that lets you know the length from looking at just the first 16 bits of the instruction. So you can do superscalar dispatch much more easily than for variable-length instruction sets such as x86.

          I don't know of anyone using instructions of 48 bits or longer at the moment, but there is a standard extension that uses 16 bit opcodes to provide aliases for the most common 32 bit instructions, such as arithmetic where the destination register is the same as the first source register, or for loads and stores at small offsets from the stack pointer or another register, or for short program branches. This is course much the same idea as ARM Thumb or more recent MIPS and PowerPC features, but unlike the original Thumb doesn't require changing modes -- 16 bit and 32 bit (and longer) instructions can be freely mixed, as with Thumb2 or the new NanoMIPS.

          1. eldakka Silver badge
            Thumb Up

            Re: There is Another Open Source CPU...

            @Bruce Hoult

            Thanks for the info and links, appreciated!

          2. bazza Silver badge

            Re: There is Another Open Source CPU...

            I suspect a licence fee is smaller than the cost of setting up the fab to make a chip. Or at least, I hope so! Funding a foundation does have wider benefits, if that's the scale of the license fee.

            A myriad variations on the RISC-V instruction set sounds fun, but could be a right nuisance; it'd be adding to the minefield of software dependencies.

            OK, so there's more to ARM than one single instruction set too, but at least that's all quite well controlled. Only a few ARM licensees have the right to alter the ISA, but they don't really do so AFAIK.

  2. Will Godfrey Silver badge
    Thumb Up

    Suits you sir!

    I rather like the relatively simple architecture. Hopefully this results in fewer hardware 'oopsies' - unlike some other types we know so well. It should also be much easier to code. I remember in the days of coding ARM2, it was amazing just how much functionality you could get out of a very small, highly orthogonal instruction set

  3. CAPS LOCK Silver badge

    I see the advantage as one of available documentation...

    No NDA's and so on which afflict some ARM SoC products.

  4. Ian Joyner

    Architecture rethink

    I'm not sure this is the right approach for the future. In fact, it seems more political than anything. Politics aside, what we need is not so much CPU architectures as entire system architectures. Traditional CPUs are designed for old-style computing, when scientific calculations were done and really the machine was dedicated to that.

    But now we have multiprogramming and new apps being loaded into machines by innocent users who know nothing much about security. Current CPU architectures (and languages) offer very little in the way of security being based on the thinking that you own the whole machine and can see the whole of memory as a flat space.

    Modern systems – even at the low level of an OS need structured memories that respect boundaries. A quick browse through the RISC-V documentation revealed no clues as to any such support for real modern computing.

    That seems a shame to me, and most probably a lost opportunity to rethink things. It seems a shame that performance is still put way in advance of user protection, which – built into the lowest levels of architecture – could be implemented in the most performance effective way, rather than building loads of software on top that is far more effective at sapping CPU cycles.

    You could look at this idea as the inverse of distributed computing. Instead of a process being distributed, many processes are implemented on a single machine on virtual processors (this is hardly a radical idea either), but the very ability to do this is baked into the system (CPU) architecture. Smalltalk was also an attempt to view the world in this way.

    Once systems are designed and implemented in this manner, real distribution becomes easy (but that is another subject).

    These are not really new ideas though – they need revisiting.

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