back to article GlobalFoundries scuttles 7nm chip plans claiming no demand

GlobalFoundries is putting its pursuit of 7nm chips on hold indefinitely. CEO Tom Caulfield said the chip fab will shift resources (including an R&D restructure) to the 14 and 12nm FinFET efforts where, he says, most of GlobalFoundries chip customers are focusing. In announcing the move, Caulfield said companies seem to have …

  1. Anonymous Coward
    Anonymous Coward

    Not a complete surprise

    With the trivial performance gains vs. the outrageous cost to continue dropping node size in insignificant dimension, it's not a complete surprise that many customers may not be willing to sign up for 7Nm chips. While percentage wise it may sound like a big deal to drop to 7Nm in reality the potential gains are quite small and the yields likely rather low for the first or second design generation runs. Tweaking existing 12Nm designs may prove more fruitful for the bottom line.

    1. Anonymous Coward
      Anonymous Coward

      Re: Not a complete surprise

      Even less of a surprise when a major alleged advantage of 7nm (basically, more cache on chip) turns out to have been largely smoke and mirrors, especially so for people who care about security as well as performance, because of e.g. leaky speculative execution and cache consistency designs which have been revealed in recent months.

      I don't know whether "tweaking existing 12nm designs" is the answer either, for people who care about security as well as performance.

      1. Dave K

        Re: Not a complete surprise

        It makes plenty of sense for GPUs though. Smaller process means more execution units, and that means more performance. Unlike CPUs where per-core performance is important, GPUs are all about massive parellism.

      2. druck Silver badge

        Re: Not a complete surprise

        If tweaking 12nm includes a redesign for spectre vulnerabilities, allowing the ditching of all the performance killing mitigation code, that will probably give far more of a boost than going to 7nm with an existing design.

      3. theblackhand

        Re: Not a complete surprise

        "especially so for people who care about security as well as performance, because of e.g. leaky speculative execution and cache consistency designs which have been revealed in recent months."

        Any fixes for security issues revealed in recent months will likely require more die space OR a smaller process node to achieve the desired performance. The smaller process node will likely be required to match or exceed current performance with the fixes in-place.

        i.e. if there is an answer (i.e. tagging cache entries with the privilege level of the process that filled the entry strikes me as the most likely possibility of keeping the benefits of caching while mitigating the worst effects of Spectre), a smaller process node will almost certainly be required to avoid a performance hit.

        1. Anonymous Coward
          Anonymous Coward

          Re: Not a complete surprise

          "[e.g.] tagging cache entries with the privilege level of the process that filled the entry"

          It's one option, perhaps, especially for those misguided souls that think x86 instructions really can be transformed into RISC instructions (with safe speculative execution) on the fly, and still be safe and secure in a system with no properly architected and/or verified approach to memory consistency across processors and processes.

          1. Steve Medway

            Re: Not a complete surprise

            Which begs the question why did intel develop Itanic when all it really needed to do was create a direct path to micro-op instructions and retire x86 'gracefully'?

            1. Claptrap314 Silver badge

              Re: Not a complete surprise

              Turns out there is a LOT more to x86 than just map between the opcodes and the upcodes. That's why the K5 was such a disaster.

              As for the Itanic, the problem of the installed base turned out to be way larger than even Intel expected.

  2. Justthefacts Silver badge

    Not great.......

    The only leading edge fabs left were Glofo,TSMC, Intel, Samsung.

    Given the cost of new fabs, it seems Glofo have now bowed out of the top tier. That leaves only three....

    Given that Samsung and Intel only make for themselves, it is now a TSMC monopoly at leading edge!

    But also, what about the tools manufacturers, specifically ASML and EUV. Increasingly they are selling to monopoly customers, may lose their reason to exist at all, and then EUV may well die too.

    1. Hugh McIntyre

      Re: Not great.......

      Samsung also does foundry manufacturing for other people, not just themselves.

      1. Steve Medway

        Re: Not great.......

        and so has intel since 2013, but no one wanted a bite of the cherry (Xilinx doesn't count cos' intel bought them).

        1. Hugh McIntyre

          Re: Not great.......

          Intel bought Altera (who were using their foundry services), not Xilinx (who were not).

  3. DCFusor
    Pint

    Wow

    More intelligent analysis in 5 or so comments here than in a year's worth of punditry. At least that outfit that rhymes with Gardener.

    Beer for all.

  4. Steve the Cynic

    An interesting (to me, anyway) thought on 7nm...

    The Unreliable Source claims that a silicon atom is about 0.1nm across, and the Si-Si bond length, according to other, possible less unreliable, sources is around a quarter of a nanometre.

    That makes a 7nm process feature less than 30 atoms wide...

  5. SamX

    End user wins

    We should see 7nm ASAP.

    Reduction would take us towards consuming more energy and better battery life. It might have a cost for AMD but if they are ready to jump in, it gives them an advantage over Intel. Even if the end user likes to stick to >10nm and sees no great advantage, their cost will be low. AMD's roll out will squeeze Intel's margins.

  6. Claptrap314 Silver badge

    Umm, guys?

    There is this thing called "leakage current". As your connections get smaller, it goes up. Fast. It entirely possible for a direct reimplementation in the next node to run slower. Lots and lots of effort goes into getting around this. It is what slowed the transition to 90nm. And 65nm. I can only imagine what has happened since.

    Not being in that part of the business for the last decade, I would point out that the STI cell microprocessor was running at more or less the same speed (almost fifteen years ago) as current processors. Moving to these next nodes have NOT in general resulted in faster processors.

    1. Alan Brown Silver badge

      Re: Umm, guys?

      "I would point out that the STI cell microprocessor was running at more or less the same speed (almost fifteen years ago) as current processors."

      True - but the power consumption was a lot higher.

      The chase for MHz ended some time back. Efficiency and density matters more once you learn how to make use of superscalar architecture.

  7. takyon
    Gimp

    Wafer Supply Agreement?

    I'm wondering how much leverage GloFo still has over AMD going into this renegotiation of the WSA. Did GlobalFoundries break the terms of the agreement, and are they still going to force AMD to purchase a bunch of components (chipsets for example)? Can AMD get a clean break?

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