back to article Intel talks concurrency and Knights Landing

The Intel Software Development Conference was on in London last week, and we took the opportunity to catch up with James Reinders, director and evangelist for parallel programming and HPC tools. Reinders is talking up Knights Landing, the next generation of Xeon Phi, Intel's MIC (many integrated core) processors, which are …

  1. PleebSmasher
    Joke

    Reinders?

    Christmas is right around the Knights Corner!

    1. Michael Wojcik Silver badge

      Re: Reinders?

      I found his discussion of the engineering choices interesting. They could have aimed to make KC a real dasher, but decided on a dancer instead.

    2. TeeCee Gold badge
      Coat

      Re: Reinders?

      Are you suggesting that after a day on the mulled wine and brandy he could be the red-nosed Reinders?

  2. phil dude
    Thumb Up

    I'm excited...

    With OpenACC, OpenMP and AMD's "HAC?" we now have a few reasonable ways of getting ~1Tflop/s from a piece of kit in a PC using a moderately portable mechanism.

    But Intel, please don't charge more than Nvidia or AMD for performance/flop.

    We need some competition so I can wobble my molecules in dense boxes!

    I might even start writing FORTRAN again...;-)

    P.

    1. PleebSmasher

      Re: I'm excited...

      Performance/flop? Performance/performance? Anyway, Knights Landing should be 3 teraflops double precision (old news) and apparently up to 8 teraflops single precision (news to me). Knights Hill will be 4.5 teraflops double precision at best.

      I think the Tegra X1 is pretty interesting, although it doesn't appear suited for FP64. It has been shown off in dual form with a very low TDP, although it's high for ARM.

      FLOPS/W is the most interesting metric around, at least until someone breaks the 3D barrier by stacking cores and achieving a 1,000x performance improvement. We will use that to make it to zettaflop supercomputing and hopefully yottaflops.

      http://gizmodo.com/intel-plans-to-put-its-insane-8-teraflop-supercomputer-1742966590

      https://en.wikipedia.org/wiki/Tegra#Tegra_X1

      http://www.theregister.co.uk/2015/01/05/ces_2015_nvidia_teraflop_cpu_cars/

      http://www.kurzweilai.net/skyscraper-style-carbon-nanotube-chip-design-boosts-electronic-performance-by-factor-of-a-thousand

      1. phil dude
        Thumb Up

        Re: I'm excited...

        @PleebSmasher: Sorry , it woz late ;-)

        P.

    2. Ian Bush
      Headmaster

      Re: I'm excited...

      Sigh ... It's Fortran, not FORTRAN. has been officially for over 25 years. I must get out more.

      1. BebopWeBop

        Re: I'm excited...

        Correct, but some of us just can't get the auto-shift key reaction when typing out of our autonomous system...

    3. Michael Wojcik Silver badge

      Re: I'm excited...

      I might even start writing FORTRAN again...;-)

      I have to admit that, having written a bit of FORTRAN 77 back in the day, I occasionally feel the urge to see what all Fortran 90 and later dialects have introduced. If it's anything like the differences between COBOL 85 and managed OO COBOL, it'd be pretty entertaining.

      (If you're entertained by that sort of thing. Which I am.)

  3. HPCJohn

    Level 39

    El Reg,

    I was at the conference. Very nice location on the 39th floor of Canary Wharf.

    Some damn good speakers too, including Mr. Reinders.

    He signed copies of his book like a celeb - I have mine!

    Maybe there is hope for us HPC types one day, and we will get the limos and the groupies.

    I can dream, can't I?

    1. PleebSmasher
      Terminator

      Re: Level 39

      When they upload themselves to the supercomputers, they will get groupies (not sure about limos).

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