Corrections needed
Christopher Scholz writes: I enjoyed the article on extending microlithography into the sub-10 nanometer range, but I feel I must correct you on a few things. Firstly, in the article you mentioned that light is used to harden a photoactive, etch-resistant film. While so-called "positive" photoresists do exist, they are very infrequently used in micro-fabrication industry, being reserved for larger items like circuit boards and lithographic prints. The problem with them lies in the fact that their primary mode of action is polymeric chain linkage. As the polymer chains grow in size and begin to intertwine, the resist film begins to swell. As this happens, it changes the ultimate size of features due to swelling laterally, and alters the focus and exposure dose characteristics non-linearly in the up-down direction. As I'm sure you can imagine, a change of only a couple nanometers is a huge swing when you're talking about <11nm features.
In the industry we use "negative" resists. Their primary mode of action is a softening of the film where light hits by "chain-scission". This makes the film easier to dissolve and wash away with a developing compound such as TMAH (Tetramethylammonium hydroxide). In order to keep the film in place during exposure, it is first soft baked. After exposing, a hard bake firms up the film even more, and advances the reaction in areas exposed to light to make the TMAH (or like developer) more effective.
Secondly, while reducing feature size below 11nm is theoretically possible, quantum effects begin to take over and the microchip as we know it will no longer be possible. The problem lies in quantum effects of electrons. At 11nm, it's no longer possible to predictably contain an electron within a gate channel. Tunneling effects become significant enough to make the narrowing of transistors a futile effort.
It's interesting technology, but I personally don't believe it will be useful in extending Moore's Law. Perhaps "Otellini's Maxim?" Even if this does allow us to double the count of transistors per die unit area, it will probably take more than 18 months from the previous node reduction.